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| author | Honghui Zhang | 2019-02-01 06:36:07 +0100 |
|---|---|---|
| committer | Lorenzo Pieralisi | 2019-03-01 12:22:21 +0100 |
| commit | cbe3a7728c7ad4721677208e155db06f67eb57d2 (patch) | |
| tree | 919e48c3264e73bfbb411f0cc2e38018586a6417 /ipc/msgutil.c | |
| parent | PCI: mediatek: Fix memory mapped IO range size computation (diff) | |
| download | kernel-qcow2-linux-cbe3a7728c7ad4721677208e155db06f67eb57d2.tar.gz kernel-qcow2-linux-cbe3a7728c7ad4721677208e155db06f67eb57d2.tar.xz kernel-qcow2-linux-cbe3a7728c7ad4721677208e155db06f67eb57d2.zip | |
PCI: mediatek: Enlarge PCIe2AHB window size to support 4GB DRAM
The PCIE_AXI_WINDOW0 register defines the inbound window size for
requests coming from PCI endpoints. Requests outside of this window will
be treated as unsupported requests.
Enlarge this window size from 2^31 to 2^33 to support a 8GB address
space (which gives endpoints DMA access to full 4GB DRAM address range
- physical DRAM starts at 0x40000000).
Reported-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'ipc/msgutil.c')
0 files changed, 0 insertions, 0 deletions