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| author | Jayachandran C | 2018-01-19 13:22:47 +0100 |
|---|---|---|
| committer | Catalin Marinas | 2018-01-23 20:59:20 +0100 |
| commit | f3d795d9b360523beca6d13ba64c2c532f601149 (patch) | |
| tree | c070edac0a5e8fe9bab727073dbeb1f72378493c /net/ipv6/proc.c | |
| parent | arm64: Run enable method for errata work arounds on late CPUs (diff) | |
| download | kernel-qcow2-linux-f3d795d9b360523beca6d13ba64c2c532f601149.tar.gz kernel-qcow2-linux-f3d795d9b360523beca6d13ba64c2c532f601149.tar.xz kernel-qcow2-linux-f3d795d9b360523beca6d13ba64c2c532f601149.zip | |
arm64: Branch predictor hardening for Cavium ThunderX2
Use PSCI based mitigation for speculative execution attacks targeting
the branch predictor. We use the same mechanism as the one used for
Cortex-A CPUs, we expect the PSCI version call to have a side effect
of clearing the BTBs.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'net/ipv6/proc.c')
0 files changed, 0 insertions, 0 deletions