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author | Jiong Wang | 2018-12-03 23:27:54 +0100 |
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committer | Alexei Starovoitov | 2018-12-07 22:29:48 +0100 |
commit | 17f6c83fb5ebf7db4fcc94a5be4c22d5a7bfe428 (patch) | |
tree | ce1e3f37bb27154204a32eada3313a634b334775 /security/loadpin | |
parent | Merge branch 'bpf_func_info-improvements' (diff) | |
download | kernel-qcow2-linux-17f6c83fb5ebf7db4fcc94a5be4c22d5a7bfe428.tar.gz kernel-qcow2-linux-17f6c83fb5ebf7db4fcc94a5be4c22d5a7bfe428.tar.xz kernel-qcow2-linux-17f6c83fb5ebf7db4fcc94a5be4c22d5a7bfe428.zip |
mips: bpf: fix encoding bug for mm_srlv32_op
For micro-mips, srlv inside POOL32A encoding space should use 0x50
sub-opcode, NOT 0x90.
Some early version ISA doc describes the encoding as 0x90 for both srlv and
srav, this looks to me was a typo. I checked Binutils libopcode
implementation which is using 0x50 for srlv and 0x90 for srav.
v1->v2:
- Keep mm_srlv32_op sorted by value.
Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction")
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Acked-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Diffstat (limited to 'security/loadpin')
0 files changed, 0 insertions, 0 deletions