diff options
| author | Greg Kroah-Hartman | 2019-01-28 08:44:58 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2019-01-28 08:44:58 +0100 |
| commit | c9381e185fdcf86e9d7966d638c933894f87cdd7 (patch) | |
| tree | d99259aded85a3fb95e9d52c56d9d3a0cfdfe460 /sound/soc/codecs/rt5682.h | |
| parent | usb: ftdi-elan: Fix if == else warnings in ftdi_elan_respond_engine (diff) | |
| parent | Linux 5.0-rc4 (diff) | |
| download | kernel-qcow2-linux-c9381e185fdcf86e9d7966d638c933894f87cdd7.tar.gz kernel-qcow2-linux-c9381e185fdcf86e9d7966d638c933894f87cdd7.tar.xz kernel-qcow2-linux-c9381e185fdcf86e9d7966d638c933894f87cdd7.zip | |
Merge 5.0-rc4 into usb-next
We need the USB fixes in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'sound/soc/codecs/rt5682.h')
| -rw-r--r-- | sound/soc/codecs/rt5682.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/sound/soc/codecs/rt5682.h b/sound/soc/codecs/rt5682.h index d82a8301fd74..96944cff0ed7 100644 --- a/sound/soc/codecs/rt5682.h +++ b/sound/soc/codecs/rt5682.h @@ -849,18 +849,18 @@ #define RT5682_SCLK_SRC_PLL2 (0x2 << 13) #define RT5682_SCLK_SRC_SDW (0x3 << 13) #define RT5682_SCLK_SRC_RCCLK (0x4 << 13) -#define RT5682_PLL1_SRC_MASK (0x3 << 10) -#define RT5682_PLL1_SRC_SFT 10 -#define RT5682_PLL1_SRC_MCLK (0x0 << 10) -#define RT5682_PLL1_SRC_BCLK1 (0x1 << 10) -#define RT5682_PLL1_SRC_SDW (0x2 << 10) -#define RT5682_PLL1_SRC_RC (0x3 << 10) -#define RT5682_PLL2_SRC_MASK (0x3 << 8) -#define RT5682_PLL2_SRC_SFT 8 -#define RT5682_PLL2_SRC_MCLK (0x0 << 8) -#define RT5682_PLL2_SRC_BCLK1 (0x1 << 8) -#define RT5682_PLL2_SRC_SDW (0x2 << 8) -#define RT5682_PLL2_SRC_RC (0x3 << 8) +#define RT5682_PLL2_SRC_MASK (0x3 << 10) +#define RT5682_PLL2_SRC_SFT 10 +#define RT5682_PLL2_SRC_MCLK (0x0 << 10) +#define RT5682_PLL2_SRC_BCLK1 (0x1 << 10) +#define RT5682_PLL2_SRC_SDW (0x2 << 10) +#define RT5682_PLL2_SRC_RC (0x3 << 10) +#define RT5682_PLL1_SRC_MASK (0x3 << 8) +#define RT5682_PLL1_SRC_SFT 8 +#define RT5682_PLL1_SRC_MCLK (0x0 << 8) +#define RT5682_PLL1_SRC_BCLK1 (0x1 << 8) +#define RT5682_PLL1_SRC_SDW (0x2 << 8) +#define RT5682_PLL1_SRC_RC (0x3 << 8) |