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authorAndrew F. Davis2019-04-01 17:13:29 +0200
committerMark Brown2019-04-02 07:41:40 +0200
commit90f0202bf2e15e8933a550b7dfd439b500a76e1c (patch)
tree950d5075725a777145502a80ec474cf524a412fc /sound/soc/codecs/tlv320aic31xx.c
parentASoC: tlv320aic31xx: Add headphone/headset detection (diff)
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ASoC: tlv320aic31xx: Add button press detection
This device can optionally detect headset or microphone button presses. Add support for this by passing this event to the jack layer. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/tlv320aic31xx.c')
-rw-r--r--sound/soc/codecs/tlv320aic31xx.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c
index a60cd8c08a14..fa47bfcb93e9 100644
--- a/sound/soc/codecs/tlv320aic31xx.c
+++ b/sound/soc/codecs/tlv320aic31xx.c
@@ -1423,10 +1423,21 @@ static irqreturn_t aic31xx_irq(int irq, void *data)
dev_err(dev, "Short circuit on Left output is detected\n");
if (value & AIC31XX_HPRSCDETECT)
dev_err(dev, "Short circuit on Right output is detected\n");
- if (value & AIC31XX_HSPLUG) {
+ if (value & (AIC31XX_HSPLUG | AIC31XX_BUTTONPRESS)) {
unsigned int val;
int status = 0;
+ ret = regmap_read(aic31xx->regmap, AIC31XX_INTRDACFLAG2,
+ &val);
+ if (ret) {
+ dev_err(dev, "Failed to read interrupt mask: %d\n",
+ ret);
+ goto exit;
+ }
+
+ if (val & AIC31XX_BUTTONPRESS)
+ status |= SND_JACK_BTN_0;
+
ret = regmap_read(aic31xx->regmap, AIC31XX_HSDETECT, &val);
if (ret) {
dev_err(dev, "Failed to read headset type: %d\n", ret);
@@ -1451,7 +1462,8 @@ static irqreturn_t aic31xx_irq(int irq, void *data)
}
if (value & ~(AIC31XX_HPLSCDETECT |
AIC31XX_HPRSCDETECT |
- AIC31XX_HSPLUG))
+ AIC31XX_HSPLUG |
+ AIC31XX_BUTTONPRESS))
dev_err(dev, "Unknown DAC interrupt flags: 0x%08x\n", value);
read_overflow:
@@ -1564,6 +1576,7 @@ static int aic31xx_i2c_probe(struct i2c_client *i2c,
regmap_write(aic31xx->regmap, AIC31XX_INT1CTRL,
AIC31XX_HSPLUGDET |
+ AIC31XX_BUTTONPRESSDET |
AIC31XX_SC |
AIC31XX_ENGINE);