diff options
| author | fengchunguo | 2019-07-31 09:41:56 +0200 |
|---|---|---|
| committer | Mark Brown | 2019-07-31 13:02:05 +0200 |
| commit | b9da500bde81ad820b5d95c6bf52fc33e1f490ee (patch) | |
| tree | 8ac6394f46075a48c3de5aaf305a6ec33f61b8cd /sound | |
| parent | ASoC: sun4i-i2s: Incorrect SR and WSS computation (diff) | |
| download | kernel-qcow2-linux-b9da500bde81ad820b5d95c6bf52fc33e1f490ee.tar.gz kernel-qcow2-linux-b9da500bde81ad820b5d95c6bf52fc33e1f490ee.tar.xz kernel-qcow2-linux-b9da500bde81ad820b5d95c6bf52fc33e1f490ee.zip | |
ASoC: max98373: add 88200 and 96000 sampling rate support
88200 and 96000 sampling rate was not enabled on driver, so can't be played.
The error information:
max98373 3-0031：rate 96000 not supported
max98373 3-0031：ASoC: can't set max98373-aif1 hw params: -22
Signed-off-by: fengchunguo <chunguo.feng@amlogic.com>
Link: https://lore.kernel.org/r/20190731074156.5620-1-chunguo.feng@amlogic.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
| -rwxr-xr-x[-rw-r--r--] | sound/soc/codecs/max98373.c | 6 | ||||
| -rwxr-xr-x[-rw-r--r--] | sound/soc/codecs/max98373.h | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/sound/soc/codecs/max98373.c b/sound/soc/codecs/max98373.c index 528695cd6a1c..8c601a3ebc27 100644..100755 --- a/sound/soc/codecs/max98373.c +++ b/sound/soc/codecs/max98373.c @@ -267,6 +267,12 @@ static int max98373_dai_hw_params(struct snd_pcm_substream *substream, case 48000: sampling_rate = MAX98373_PCM_SR_SET1_SR_48000; break; + case 88200: + sampling_rate = MAX98373_PCM_SR_SET1_SR_88200; + break; + case 96000: + sampling_rate = MAX98373_PCM_SR_SET1_SR_96000; + break; default: dev_err(component->dev, "rate %d not supported\n", params_rate(params)); diff --git a/sound/soc/codecs/max98373.h b/sound/soc/codecs/max98373.h index f6a37aa02f26..a59e51355a84 100644..100755 --- a/sound/soc/codecs/max98373.h +++ b/sound/soc/codecs/max98373.h @@ -130,6 +130,8 @@ #define MAX98373_PCM_SR_SET1_SR_32000 (0x6 << 0) #define MAX98373_PCM_SR_SET1_SR_44100 (0x7 << 0) #define MAX98373_PCM_SR_SET1_SR_48000 (0x8 << 0) +#define MAX98373_PCM_SR_SET1_SR_88200 (0x9 << 0) +#define MAX98373_PCM_SR_SET1_SR_96000 (0xA << 0) /* MAX98373_R2028_PCM_SR_SETUP_2 */ #define MAX98373_PCM_SR_SET2_SR_MASK (0xF << 4) |