diff options
| -rw-r--r-- | arch/mips/ath79/clock.c | 11 | ||||
| -rw-r--r-- | arch/mips/ath79/setup.c | 12 |
2 files changed, 12 insertions, 11 deletions
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c index c8351b46e566..ebd4340cdc8f 100644 --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c @@ -387,17 +387,6 @@ void __init ath79_clocks_init(void) qca955x_clocks_init(); else BUG(); - - pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, " - "Ref:%lu.%03luMHz", - ath79_cpu_clk.rate / 1000000, - (ath79_cpu_clk.rate / 1000) % 1000, - ath79_ddr_clk.rate / 1000000, - (ath79_ddr_clk.rate / 1000) % 1000, - ath79_ahb_clk.rate / 1000000, - (ath79_ahb_clk.rate / 1000) % 1000, - ath79_ref_clk.rate / 1000000, - (ath79_ref_clk.rate / 1000) % 1000); } unsigned long __init diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c index e3b83456d64e..c02d3459b3ea 100644 --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c @@ -210,8 +210,20 @@ void __init plat_mem_setup(void) void __init plat_time_init(void) { unsigned long cpu_clk_rate; + unsigned long ahb_clk_rate; + unsigned long ddr_clk_rate; + unsigned long ref_clk_rate; cpu_clk_rate = ath79_get_sys_clk_rate("cpu"); + ahb_clk_rate = ath79_get_sys_clk_rate("ahb"); + ddr_clk_rate = ath79_get_sys_clk_rate("ddr"); + ref_clk_rate = ath79_get_sys_clk_rate("ref"); + + pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz", + cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000, + ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000, + ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000, + ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000); mips_hpt_frequency = cpu_clk_rate / 2; } |