summaryrefslogtreecommitdiffstats
path: root/drivers/pci
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/msi.c151
-rw-r--r--drivers/pci/pci.c14
-rw-r--r--drivers/pci/pci.h2
-rw-r--r--drivers/pci/pcie/portdrv_pci.c2
-rw-r--r--drivers/pci/probe.c45
-rw-r--r--drivers/pci/quirks.c18
6 files changed, 53 insertions, 179 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 01869b1782e4..435c1958a7b7 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -94,12 +94,14 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
writel(flag, entry->mask_base + offset);
+ readl(entry->mask_base + offset);
break;
}
default:
BUG();
break;
}
+ entry->msi_attrib.masked = !!flag;
}
void read_msi_msg(unsigned int irq, struct msi_msg *msg)
@@ -179,6 +181,7 @@ void write_msi_msg(unsigned int irq, struct msi_msg *msg)
default:
BUG();
}
+ entry->msg = *msg;
}
void mask_msi_irq(unsigned int irq)
@@ -225,164 +228,60 @@ static struct msi_desc* alloc_msi_entry(void)
}
#ifdef CONFIG_PM
-static int __pci_save_msi_state(struct pci_dev *dev)
-{
- int pos, i = 0;
- u16 control;
- struct pci_cap_saved_state *save_state;
- u32 *cap;
-
- if (!dev->msi_enabled)
- return 0;
-
- pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
- if (pos <= 0)
- return 0;
-
- save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
- GFP_KERNEL);
- if (!save_state) {
- printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
- return -ENOMEM;
- }
- cap = &save_state->data[0];
-
- pci_read_config_dword(dev, pos, &cap[i++]);
- control = cap[0] >> 16;
- pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
- if (control & PCI_MSI_FLAGS_64BIT) {
- pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
- pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
- } else
- pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
- if (control & PCI_MSI_FLAGS_MASKBIT)
- pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
- save_state->cap_nr = PCI_CAP_ID_MSI;
- pci_add_saved_cap(dev, save_state);
- return 0;
-}
-
static void __pci_restore_msi_state(struct pci_dev *dev)
{
- int i = 0, pos;
+ int pos;
u16 control;
- struct pci_cap_saved_state *save_state;
- u32 *cap;
+ struct msi_desc *entry;
if (!dev->msi_enabled)
return;
- save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
- pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
- if (!save_state || pos <= 0)
- return;
- cap = &save_state->data[0];
+ entry = get_irq_msi(dev->irq);
+ pos = entry->msi_attrib.pos;
pci_intx(dev, 0); /* disable intx */
- control = cap[i++] >> 16;
msi_set_enable(dev, 0);
- pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
- if (control & PCI_MSI_FLAGS_64BIT) {
- pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
- pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
- } else
- pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
- if (control & PCI_MSI_FLAGS_MASKBIT)
- pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
+ write_msi_msg(dev->irq, &entry->msg);
+ if (entry->msi_attrib.maskbit)
+ msi_set_mask_bit(dev->irq, entry->msi_attrib.masked);
+
+ pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
+ control &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE);
+ if (entry->msi_attrib.maskbit || !entry->msi_attrib.masked)
+ control |= PCI_MSI_FLAGS_ENABLE;
pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
- pci_remove_saved_cap(save_state);
- kfree(save_state);
-}
-
-static int __pci_save_msix_state(struct pci_dev *dev)
-{
- int pos;
- int irq, head, tail = 0;
- u16 control;
- struct pci_cap_saved_state *save_state;
-
- if (!dev->msix_enabled)
- return 0;
-
- pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
- if (pos <= 0)
- return 0;
-
- /* save the capability */
- pci_read_config_word(dev, msi_control_reg(pos), &control);
- save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
- GFP_KERNEL);
- if (!save_state) {
- printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
- return -ENOMEM;
- }
- *((u16 *)&save_state->data[0]) = control;
-
- /* save the table */
- irq = head = dev->first_msi_irq;
- while (head != tail) {
- struct msi_desc *entry;
-
- entry = get_irq_msi(irq);
- read_msi_msg(irq, &entry->msg_save);
-
- tail = entry->link.tail;
- irq = tail;
- }
-
- save_state->cap_nr = PCI_CAP_ID_MSIX;
- pci_add_saved_cap(dev, save_state);
- return 0;
-}
-
-int pci_save_msi_state(struct pci_dev *dev)
-{
- int rc;
-
- rc = __pci_save_msi_state(dev);
- if (rc)
- return rc;
-
- rc = __pci_save_msix_state(dev);
-
- return rc;
}
static void __pci_restore_msix_state(struct pci_dev *dev)
{
- u16 save;
int pos;
int irq, head, tail = 0;
struct msi_desc *entry;
- struct pci_cap_saved_state *save_state;
+ u16 control;
if (!dev->msix_enabled)
return;
- save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
- if (!save_state)
- return;
- save = *((u16 *)&save_state->data[0]);
- pci_remove_saved_cap(save_state);
- kfree(save_state);
-
- pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
- if (pos <= 0)
- return;
-
/* route the table */
pci_intx(dev, 0); /* disable intx */
msix_set_enable(dev, 0);
irq = head = dev->first_msi_irq;
+ entry = get_irq_msi(irq);
+ pos = entry->msi_attrib.pos;
while (head != tail) {
entry = get_irq_msi(irq);
- write_msi_msg(irq, &entry->msg_save);
+ write_msi_msg(irq, &entry->msg);
+ msi_set_mask_bit(irq, entry->msi_attrib.masked);
tail = entry->link.tail;
irq = tail;
}
- pci_write_config_word(dev, msi_control_reg(pos), save);
+ pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
+ control &= ~PCI_MSIX_FLAGS_MASKALL;
+ control |= PCI_MSIX_FLAGS_ENABLE;
+ pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
}
void pci_restore_msi_state(struct pci_dev *dev)
@@ -420,6 +319,7 @@ static int msi_capability_init(struct pci_dev *dev)
entry->msi_attrib.is_64 = is_64bit_address(control);
entry->msi_attrib.entry_nr = 0;
entry->msi_attrib.maskbit = is_mask_bit_support(control);
+ entry->msi_attrib.masked = 1;
entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
entry->msi_attrib.pos = pos;
if (is_mask_bit_support(control)) {
@@ -507,6 +407,7 @@ static int msix_capability_init(struct pci_dev *dev,
entry->msi_attrib.is_64 = 1;
entry->msi_attrib.entry_nr = j;
entry->msi_attrib.maskbit = 1;
+ entry->msi_attrib.masked = 1;
entry->msi_attrib.default_irq = dev->irq;
entry->msi_attrib.pos = pos;
entry->dev = dev;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a32db0628157..d3eab057b2d3 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -551,7 +551,9 @@ static int pci_save_pcie_state(struct pci_dev *dev)
if (pos <= 0)
return 0;
- save_state = kzalloc(sizeof(*save_state) + sizeof(u16) * 4, GFP_KERNEL);
+ save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
+ if (!save_state)
+ save_state = kzalloc(sizeof(*save_state) + sizeof(u16) * 4, GFP_KERNEL);
if (!save_state) {
dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n");
return -ENOMEM;
@@ -582,8 +584,6 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
- pci_remove_saved_cap(save_state);
- kfree(save_state);
}
@@ -597,7 +597,9 @@ static int pci_save_pcix_state(struct pci_dev *dev)
if (pos <= 0)
return 0;
- save_state = kzalloc(sizeof(*save_state) + sizeof(u16), GFP_KERNEL);
+ save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
+ if (!save_state)
+ save_state = kzalloc(sizeof(*save_state) + sizeof(u16), GFP_KERNEL);
if (!save_state) {
dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n");
return -ENOMEM;
@@ -622,8 +624,6 @@ static void pci_restore_pcix_state(struct pci_dev *dev)
cap = (u16 *)&save_state->data[0];
pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);
- pci_remove_saved_cap(save_state);
- kfree(save_state);
}
@@ -638,8 +638,6 @@ pci_save_state(struct pci_dev *dev)
/* XXX: 100% dword access ok here? */
for (i = 0; i < 16; i++)
pci_read_config_dword(dev, i * 4,&dev->saved_config_space[i]);
- if ((i = pci_save_msi_state(dev)) != 0)
- return i;
if ((i = pci_save_pcie_state(dev)) != 0)
return i;
if ((i = pci_save_pcix_state(dev)) != 0)
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index ae7a975995a5..62ea04c8af64 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -52,10 +52,8 @@ static inline void pci_no_msi(void) { }
#endif
#if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM)
-int pci_save_msi_state(struct pci_dev *dev);
void pci_restore_msi_state(struct pci_dev *dev);
#else
-static inline int pci_save_msi_state(struct pci_dev *dev) { return 0; }
static inline void pci_restore_msi_state(struct pci_dev *dev) {}
#endif
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 0be5a0b30725..df383645e366 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -93,7 +93,7 @@ static int __devinit pcie_portdrv_probe (struct pci_dev *dev,
if (!dev->irq && dev->pin) {
printk(KERN_WARNING
"%s->Dev[%04x:%04x] has invalid IRQ. Check vendor BIOS\n",
- __FUNCTION__, dev->device, dev->vendor);
+ __FUNCTION__, dev->vendor, dev->device);
}
if (pcie_port_device_register(dev)) {
pci_disable_device(dev);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a4a96826d9e0..2fe1d690eb13 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -682,34 +682,7 @@ static void pci_read_irq(struct pci_dev *dev)
dev->irq = irq;
}
-static void change_legacy_io_resource(struct pci_dev * dev, unsigned index,
- unsigned start, unsigned end)
-{
- unsigned base = start & PCI_BASE_ADDRESS_IO_MASK;
- unsigned len = (end | ~PCI_BASE_ADDRESS_IO_MASK) - base + 1;
-
- /*
- * Some X versions get confused when the BARs reported through
- * /sys or /proc differ from those seen in config space, thus
- * try to update the config space values, too.
- */
- if (!(pci_resource_flags(dev, index) & IORESOURCE_IO))
- printk(KERN_WARNING "%s: cannot adjust BAR%u (not I/O)\n",
- pci_name(dev), index);
- else if (pci_resource_len(dev, index) != len)
- printk(KERN_WARNING "%s: cannot adjust BAR%u (size %04X)\n",
- pci_name(dev), index, (unsigned)pci_resource_len(dev, index));
- else {
- printk(KERN_INFO "%s: trying to change BAR%u from %04X to %04X\n",
- pci_name(dev), index,
- (unsigned)pci_resource_start(dev, index), base);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + index * 4, base);
- }
- pci_resource_start(dev, index) = start;
- pci_resource_end(dev, index) = end;
- pci_resource_flags(dev, index) =
- IORESOURCE_IO | IORESOURCE_PCI_FIXED | PCI_BASE_ADDRESS_SPACE_IO;
-}
+#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
/**
* pci_setup_device - fill in class and map information of a device
@@ -762,12 +735,20 @@ static int pci_setup_device(struct pci_dev * dev)
u8 progif;
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
if ((progif & 1) == 0) {
- change_legacy_io_resource(dev, 0, 0x1F0, 0x1F7);
- change_legacy_io_resource(dev, 1, 0x3F6, 0x3F6);
+ dev->resource[0].start = 0x1F0;
+ dev->resource[0].end = 0x1F7;
+ dev->resource[0].flags = LEGACY_IO_RESOURCE;
+ dev->resource[1].start = 0x3F6;
+ dev->resource[1].end = 0x3F6;
+ dev->resource[1].flags = LEGACY_IO_RESOURCE;
}
if ((progif & 4) == 0) {
- change_legacy_io_resource(dev, 2, 0x170, 0x177);
- change_legacy_io_resource(dev, 3, 0x376, 0x376);
+ dev->resource[2].start = 0x170;
+ dev->resource[2].end = 0x177;
+ dev->resource[2].flags = LEGACY_IO_RESOURCE;
+ dev->resource[3].start = 0x376;
+ dev->resource[3].end = 0x376;
+ dev->resource[3].flags = LEGACY_IO_RESOURCE;
}
}
break;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 7f94fc098cd3..65d6f23ead41 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -963,6 +963,13 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, k8t_sound_ho
* bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
* becomes necessary to do this tweak in two steps -- I've chosen the Host
* bridge as trigger.
+ *
+ * Note that we used to unhide the SMBus that way on Toshiba laptops
+ * (Satellite A40 and Tecra M2) but then found that the thermal management
+ * was done by SMM code, which could cause unsynchronized concurrent
+ * accesses to the SMBus registers, with potentially bad effects. Thus you
+ * should be very careful when adding new entries: if SMM is accessing the
+ * Intel SMBus, this is a very good reason to leave it hidden.
*/
static int asus_hides_smbus;
@@ -1040,17 +1047,6 @@ static void __init asus_hides_smbus_hostbridge(struct pci_dev *dev)
case 0x099c: /* HP Compaq nx6110 */
asus_hides_smbus = 1;
}
- } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_TOSHIBA)) {
- if (dev->device == PCI_DEVICE_ID_INTEL_82855GM_HB)
- switch(dev->subsystem_device) {
- case 0x0001: /* Toshiba Satellite A40 */
- asus_hides_smbus = 1;
- }
- else if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
- switch(dev->subsystem_device) {
- case 0x0001: /* Toshiba Tecra M2 */
- asus_hides_smbus = 1;
- }
} else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)) {
if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
switch(dev->subsystem_device) {
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-03-17 05:31:17 +0100