diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/osiris-cpld.h | 25 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/osiris-map.h | 41 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/param.h | 27 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-gpio.h | 2 |
4 files changed, 68 insertions, 27 deletions
diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h new file mode 100644 index 000000000000..e9d1ae1f354f --- /dev/null +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -0,0 +1,25 @@ +/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h + * + * (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * OSIRIS - CPLD control constants + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_OSIRISCPLD_H +#define __ASM_ARCH_OSIRISCPLD_H + +/* CTRL1 - NAND WP control */ + +#define OSIRIS_CTRL1_NANDSEL (0x3) +#define OSIRIS_CTRL1_BOOT_INT (1<<3) +#define OSIRIS_CTRL1_PCMCIA (1<<4) +#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) + +#endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h new file mode 100644 index 000000000000..7c4b0cd2d14d --- /dev/null +++ b/include/asm-arm/arch-s3c2410/osiris-map.h @@ -0,0 +1,41 @@ +/* linux/include/asm-arm/arch-s3c2410/osiris-map.h + * + * (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * OSIRIS - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: +*/ + +/* needs arch/map.h including with this */ + +#ifndef __ASM_ARCH_OSIRISMAP_H +#define __ASM_ARCH_OSIRISMAP_H + +/* start peripherals off after the S3C2410 */ + +#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x05000000)) + +#define OSIRIS_PA_CPLD (S3C2410_CS1 | (3<<25)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) /* 0x01300000 */ +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) + +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) /* 0x01400000 */ +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<24)) + +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) /* 0x01500000 */ +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<24)) + +#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) /* 0x01600000 */ +#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<24)) + +#endif /* __ASM_ARCH_OSIRISMAP_H */ diff --git a/include/asm-arm/arch-s3c2410/param.h b/include/asm-arm/arch-s3c2410/param.h deleted file mode 100644 index 483d3f149883..000000000000 --- a/include/asm-arm/arch-s3c2410/param.h +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/param.h - * - * (c) 2003 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - Machine parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 02-Sep-2003 BJD Created file - * 12-Mar-2004 BJD Added include protection -*/ - -#ifndef __ASM_ARCH_PARAM_H -#define __ASM_ARCH_PARAM_H - -/* we cannot get our timer down to 100Hz with the setup as is, but we can - * manage 200 clock ticks per second... if this is a problem, we can always - * add a software pre-scaler to the evil timer systems. -*/ - -#define HZ 200 - -#endif /* __ASM_ARCH_PARAM_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index 9697f93afe74..d2574084697f 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -979,6 +979,7 @@ #define S3C2410_MISCCR_CLK0_HCLK (3<<4) #define S3C2410_MISCCR_CLK0_PCLK (4<<4) #define S3C2410_MISCCR_CLK0_DCLK0 (5<<4) +#define S3C2410_MISCCR_CLK0_MASK (7<<4) #define S3C2410_MISCCR_CLK1_MPLL (0<<8) #define S3C2410_MISCCR_CLK1_UPLL (1<<8) @@ -986,6 +987,7 @@ #define S3C2410_MISCCR_CLK1_HCLK (3<<8) #define S3C2410_MISCCR_CLK1_PCLK (4<<8) #define S3C2410_MISCCR_CLK1_DCLK1 (5<<8) +#define S3C2410_MISCCR_CLK1_MASK (7<<8) #define S3C2410_MISCCR_USBSUSPND0 (1<<12) #define S3C2410_MISCCR_USBSUSPND1 (1<<13) |