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* [POWERPC] Remove iSeries_vio_devStephen Rothwell2007-10-118-35/+57
| | | | | | | | | | It was only being used to carry around dma_iommu_ops and vio_iommu_table which we can use directly instead. This also means that vio_bus_device doesn't need to refer to them either. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: Simplify viocd initialisationStephen Rothwell2007-10-111-24/+13Star
| | | | | | | | | We don't need to keep a lump of dma coherent memory around for the life of the module. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Clean up vio.hStephen Rothwell2007-10-112-16/+0Star
| | | | | | | | Remove vio_dma_ops declaration (since it no longer exists) and some unused fields from struct vio_driver. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Platforms shouldn't mess with ROOT_DEVGrant Likely2007-10-115-34/+0Star
| | | | | | | | There is no good reason for board platform code to mess with the ROOT_DEV. Remove it from all in-tree platforms except powermac. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove empty ppc_md.setup_arch hooksGrant Likely2007-10-115-25/+0Star
| | | | | | Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Only call ppc_md.setup_arch() if it is providedGrant Likely2007-10-113-3/+5
| | | | | | | | This allows platforms which don't have anything to do at setup_arch time (like a bunch of the 4xx platforms) to eliminate an empty setup_arch hook. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Disable vDSO support for ARCH=ppc where it's not implementedWolfgang Denk2007-10-111-0/+2
| | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Align the sys_call_tableStephen Rothwell2007-10-111-0/+2
| | | | | | | | | | | | Our _GLOBAL macro does a ".align 2" so the alignment is fine for 32 bit, but on 64 bit it is possible for it to end up only 4 byte aligned. I don't know if it matters, but it can't hurt to 8 byte align it. It also means that when we build with --emit_relocs, none of our 64 bit relocations are to misaligned places. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove redundant reference to non-existent CONFIG_BOOTIMGRobert P. J. Day2007-10-092-6/+0Star
| | | | | | | | There is no BOOTIMG Kconfig variable, not to mention that there is no include/linux/bootimg.h header file. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] PS3: Add os-area database routinesGeoff Levand2007-10-091-14/+431
| | | | | | | | | | | | | | | Add support for a simple tagged database in the PS3 flash rom os-area. The database allows the flash rom os-area to be shared between a bootloader and installed operating systems. The application ps3-flash-util or the library libps3-utils from the ps3-utils package can be used for userspace database operations. The latest ps3-utils package is available here: git://git.kernel.org/pub/scm/linux/kernel/git/geoff/ps3-utils.git Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] PS3: Save os-area params to device treeGeoff Levand2007-10-093-2/+104
| | | | | | | | Add the PS3 os-area startup params to the device tree. This allows a second stage kernel loaded with kexec to use these values. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] PS3: Add os-area rtc_diff set/get routinesGeoff Levand2007-10-093-14/+22
| | | | | | | | | | Updates for PS3 os-area rtc_diff set/get routines o Add a new routine ps3_os_area_set_rtc_diff(). o Rename ps3_os_area_rtc_diff() to ps3_os_area_get_rtc_diff(). o Remove static variable rtc_shift with calls to ps3_os_area_get_rtc_diff(). Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] PS3: os-area workqueue processingGeoff Levand2007-10-091-0/+23
| | | | | | | | | Add a workqueue to the PS3 os-area support. This is needed to support writing updates to flash memory and to update the /proc device tree entries from the timer tick interrupt context. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] PS3: Remove unused os-area paramsGeoff Levand2007-10-093-27/+21Star
| | | | | | | | | | Updates for PS3 os-area startup params o Remove some unused PS3 os-area startup params from struct saved_params. o Rename ps3_os_area_init() to ps3_os_area_save_params(). o Zero mirrored header after saving params. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] PS3: Cleanup of os-area.cGeoff Levand2007-10-091-12/+15
| | | | | | | | | | | | Minor cleanup of the PS3 file os-area.c: o Correct file text header. o Add type names enum os_area_ldr_format, enum os_area_boot_flag, enum os_area_ctrl_button. o Change struct os_area_header.magic_num type to u8. o Add preprocessor macro SECONDS_FROM_1970_TO_2000. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add Cell memory controller register defs and expose itBenjamin Herrenschmidt2007-10-092-2/+56
| | | | | | | | | | | This adds definitions for the Cell memory controller registers (at least some of them) for use by the EDAC driver for ECC error reporting. It also expose the said MIC as a platform device that can be used by the EDAC driver to match on. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.hBenjamin Herrenschmidt2007-10-0914-15/+13Star
| | | | | | | | | | The new Cell EDAC driver needs that file, oprofile also does ugly path tricks to get to it, it's time to move it to asm-powerpc. While at it, rename it to be consistent with cell-pmu.h (and dashes look nicer than underscores anyway). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Enable debug info on boot wrapperGrant Likely2007-10-091-0/+4
| | | | | | | Add '-g' to BOOTCFLAGS if CONFIG_DEBUG_INFO is set. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove unused old code from powermac setup codePaul Mackerras2007-10-091-66/+2Star
| | | | | | | | | | | | | | Since bootdevice never gets initialized, it's always NULL, and hence a whole pile of code in arch/powerpc/platforms/setup.c never gets used. (This was the code that originally was there so that the automatic root partition selection mechanism would prefer a rootish-looking partition on the device that OF loaded the kernel from over a similar partition on other devices.) This removes the unused code. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* [POWERPC] Remove some more section mismatch warningsStephen Rothwell2007-10-091-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WARNING: vmlinux.o(.text+0x2ff5c): Section mismatch: reference to .init.text:.pmac_find_ide_boot (between '.note_bootable_part' and '.note_scsi_host') >From holly_defconfig: WARNING: vmlinux.o(.text+0x164fe): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') WARNING: vmlinux.o(.text+0x16506): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') >From linkstation_defconfig: WARNING: vmlinux.o(.text+0x158fe): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') WARNING: vmlinux.o(.text+0x15906): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') >From mpc7448_hpc2_defconfig: WARNING: vmlinux.o(.text+0x1583e): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') WARNING: vmlinux.o(.text+0x15846): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') >From pmac32_defconfig: WARNING: vmlinux.o(.text+0x154ca): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'note_scsi_host') WARNING: vmlinux.o(.text+0x154d2): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'note_scsi_host') WARNING: vmlinux.o(.text+0x1553c): Section mismatch: reference to .init.text:pmac_find_ide_boot (between 'note_bootable_part' and 'note_scsi_host') >From ppc64_defconfig: WARNING: vmlinux.o(.text+0x3acdc): Section mismatch: reference to .init.text:.pmac_find_ide_boot (between '.note_bootable_part' and '.note_scsi_host') >From prpmc2800_defconfig: WARNING: vmlinux.o(.text+0x1611e): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') WARNING: vmlinux.o(.text+0x16126): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu') Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Use cache-inhibited large page bit from firmwarePaul Mackerras2007-10-091-3/+0Star
| | | | | | | | | | | | Discussions with firmware architects have confirmed that the bit in the ibm,pa-features property that indicates support for cache-inhibited large (>= 64kB) page mappings does in fact mean that the hypervisor allows 64kB mappings to I/O devices. Thus we can now enable the code that tests that bit and sets our CPU_FTR_CI_LARGE_PAGE feature bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Prepare to remove of_platform_driver nameStephen Rothwell2007-10-091-6/+11
| | | | | | | | | | | | | The name field of of_platform_driver is just copied into the included device_driver. By not overriding an already initialised device_driver name, we can convert the drivers over time to stop using the of_platform_driver name. Also we were not copying the owner field from of_platform_driver, so do the same with it. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: Correct missing newline in printkStephen Rothwell2007-10-091-1/+1
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Lite5200: Use comma delimiter format for lists in device treeGrant Likely2007-10-082-36/+36
| | | | | | | | DTC now supports "foo","bar" format for lists of strings; use the new format on the lite5200 device trees. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] spi: Support non-QE processorsPeter Korsgaard2007-10-081-0/+4
| | | | | | | On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properlyAnton Vorontsov2007-10-081-12/+16
| | | | | | | | | | Apart from that the current code doesn't compile it's also meaningless with regard to the MPC8568E-MDS' BCSR. This patch used to reset UCCs properly. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCsAnton Vorontsov2007-10-081-11/+11
| | | | | | | | | | | | 1. UCC1's RX_DV pin is 16, not 15; 2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent u-boot also using 0x7. 3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup. 4. tx-clock should be CLK16 (GE125, PB31); 5. phy-connection-type is RGMII-ID; Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] QE: pario - support for MPC85xx layoutAnton Vorontsov2007-10-081-0/+3
| | | | | | | | 8 bytes padding required to match MPC85xx registers layout. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Reviewed-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascadingAnton Vorontsov2007-10-086-27/+78
| | | | | | | | | | | | | | | | | | | | | | | | | set_irq_chained_handler overwrites MPIC's handle_irq function (handle_fasteoi_irq) thus MPIC never gets eoi event from the cascaded IRQ. This situation hangs MPIC on MPC8568E. To solve this problem efficiently, QEIC needs pluggable handlers, specific to the underlaying interrupt controller. Patch extends qe_ic_init() function to accept low and high interrupt handlers. To avoid #ifdefs, stack of interrupt handlers specified in the header file and functions are marked 'static inline', thus handlers are compiled-in only if actually used (in the board file). Another option would be to lookup for parent controller and automatically detect handlers (will waste text size because of never used handlers, so this option abolished). qe_ic_init() also changed in regard to support multiplexed high/low lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic() handler implemented appropriately. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] mpc85xx_mds: select QUICC_ENGINEAnton Vorontsov2007-10-081-1/+1
| | | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 86xx: update immap_86xx.h for the 8610Timur Tabi2007-10-081-8/+78
| | | | | | | | Update the definition of the global utilities structure (ccsr_guts) in immap_86xx.h and add some related macros for the Freescale 8610 SOC. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx/86xx: refactor RSTCR reset codeKumar Gala2007-10-0813-142/+53Star
| | | | | | | | | On the majority of 85xx & 86xx we have a register that's ability to assert HRESET_REQ to reset the board. We refactored that code so it can be shared between both platforms into fsl_soc.c and removed all the duplication in each platform directory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Use for_each_ matching routinues for pci PHBsKumar Gala2007-10-0813-27/+45
| | | | | | | | | | | | On the Freescale embedded (83xx, 85xx, 86xx) and a few of the discrete bridges (mpc10x, tsi108) use the new for_each_compatible_node() or for_each_node_by_type() to provide more exact matching when looking for PHBs in the device tree. With the previous code it was possible to match on pci bridges since we were only matching on device_type. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] FSL: Access PCIe LTSSM register with correct sizeKumar Gala2007-10-081-2/+2
| | | | | | | The LTSSM register is actual 32-bits wide so we should be doing a dword access. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEMDale Farnsworth2007-10-081-0/+2
| | | | | | | | | | | | | | | | | | | The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=y and the 3 fixed TLB entries cannot exactly map the lowmem size. Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure is observed when the kernel lowmem size is not equal to the sum of up to 3 of those values. Normally, memory is sized in nice numbers, but I observed this problem while testing a crash dump kernel. The failure can also be observed by artificially reducing the kernel's main memory via the mem= kernel command line parameter. This commit fixes the problem by setting __initial_memory_limit in adjust_total_lowmem(). Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add initial MPC8610 HPCD Platform files.Xianghua Xiao2007-10-084-0/+1270
| | | | | | | | | | Add basic board support for the MPC8610 HPCD. This does not include any support the SoC Display or Audio controllers. Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loelier <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Treat 8610 PCIe host bridge as transparentJason Jin2007-10-082-0/+2
| | | | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add initial MPC8610 HPCD Device Tree Source file.Xianghua Xiao2007-10-081-0/+191
| | | | | | Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] spi: mode should be "cpu-qe" instead of "qe"Peter Korsgaard2007-10-081-1/+1
| | | | | | | | Mode should be "cpu-qe" for QE in CPU mode. "qe" should be reserved for native QE mode. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] spi: Use fsl_spi instead of mpc83xx_spiPeter Korsgaard2007-10-084-8/+8
| | | | | | | | According to booting-without-of.txt, compatible should be "fsl_spi" and mode "cpu" or "qe" for the fsl SPI controllers. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] qe: miscellaneous code improvements and fixes to the QE libraryTimur Tabi2007-10-0812-412/+431
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes numerous miscellaneous code improvements to the QE library. 1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type() (every caller of ucc_init_guemr() also calls ucc_set_type()). Modify all callers of ucc_set_type() accordingly. 2. Remove the unused enum ucc_pram_initial_offset. 3. Refactor qe_setbrg(), also implement work-around for errata QE_General4. 4. Several printk() calls were missing the terminating \n. 5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where appropriate. 6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed with the wrong value. 7. Add the protocol type to struct us_info and updated ucc_slow_init() to use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED. 8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx() 9. Add several macros in qe.h (mostly for slow UCC support, but also to standardize some naming convention) and remove several unused macros. 10. Update ucc_geth.c to use the new macros. 11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol to use when initializing the UCC in ucc_slow_init(). 12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since these are the real names of the registers. 13. Use the setbits, clrbits, and clrsetbits where appropriate. 14. Refactor ucc_set_qe_mux_rxtx(). 15. Remove all instances of 'volatile'. 16. Simplify get_cmxucr_reg(); 17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[]. 18. Updated struct ucc_geth because struct ucc_fast is not padded any more. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Update .gitignore for new vdso generated filesKumar Gala2007-10-082-0/+2
| | | | | | | We now generate vdso[32,64].so.dbg as part of the build so add them to .gitignore Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Fixup MPC8568 dtsKumar Gala2007-10-081-55/+70
| | | | | | | | The PCI nodes on the MPC8568 dts didn't get moved up to be sibilings of the SOC node when we did that clean up for some reason. Fix that up and some minor whitespace and adjusting the size of the soc reg property. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and sizeAnton Vorontsov2007-10-041-2/+2
| | | | | | | | | | | According to u-boot/board/mpc8568mds/init.S: LAW(Local Access Window) configuration: 2) 0xa000_0000 0xbfff_ffff PCIe MEM 512MB 4) 0xe280_0000 0xe2ff_ffff PCIe I/O 8M Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] MPC8568E-MDS: add support for ds1374 rtcAnton Vorontsov2007-10-042-0/+10
| | | | | | | | | | | | MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it. This patch also adds #address-cells and #size-cells to the I2C controllers nodes. p.s. DS1374 rtc class driver is in the -mm tree, its name is rtc-rtc-class-driver-for-the-ds1374.patch. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] fsl_soc: fix uninitialized i2c_board_info structureAnton Vorontsov2007-10-041-2/+1Star
| | | | | | | | | i2c_board_info used semi-initialized, causing garbage in the info->flags, and that, in turn, causes various symptoms of i2c malfunctioning, like PEC mismatches. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm: Describe multi-user ram in its own device node.Scott Wood2007-10-0414-48/+337
| | | | | | | | | | | | | | | | | | | | | The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it. It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue. The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Cleaned up whitespace in head_fsl_booke.SKumar Gala2007-10-041-38/+38
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] QE: Added missing CEURNR registerEmil Medve2007-10-041-2/+3
| | | | | | | | | | According to the publicly available MPC8360E RM (rev. 1 from 09/2006 and rev. 2 from 05/2007) and MPC8323E RM (rev. 1 from 09/2006), CEURNR is the QE microcode revision number register and is located at offset 0x1b8 within the QE internal register space Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] fsl_soc: rtc-ds1307 supportPeter Korsgaard2007-10-041-0/+6
| | | | | | | | | Add support for the I2C devices handled by the rtc-ds1307 driver to of_register_i2c_devices. Cc: G. Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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