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* Merge tag 'clk-for-linus' of ↵Linus Torvalds2018-04-141-5/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The large diff this time around is from the addition of a new clk driver for the TI Davinci family of SoCs. So far those clks have been supported with a custom implementation of the clk API in the arch port instead of in the CCF. With this driver merged we're one step closer to having a single clk API implementation. The other large diff is from the Amlogic clk driver that underwent some major surgery to use regmap. Beyond that, the biggest hitter is Samsung which needed some reworks to properly handle clk provider power domains and a bunch of PLL rate updates. The core framework was fairly quiet this round, just getting some cleanups and small fixes for some of the more esoteric features. And the usual set of driver non-critical fixes, cleanups, and minor additions are here as well. Core: - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops - debugfs ops macroized to shave some lines of boilerplate code - Always calculate the phase instead of caching it in clk_get_phase() - More __must_check on bulk clk APIs New Drivers: - TI's Davinci family of SoCs - Intel's Stratix10 SoC - stm32mp157 SoC - Allwinner H6 CCU - Silicon Labs SI544 clock generator chip - Renesas R-Car M3-N and V3H SoCs - i.MX6SLL SoCs Removed Drivers: - ST-Ericsson AB8540/9540 Updates: - Mediatek MT2701 and MT7622 audsys support and MT2712 updates - STM32F469 DSI and STM32F769 sdmmc2 support - GPIO clks can sleep now - Spreadtrum SC9860 RTC clks - Nvidia Tegra MBIST workarounds and various minor fixes - Rockchip phase handling fixes and a memory leak plugged - Renesas drivers switch to readl/writel from clk_readl/clk_writel - Renesas gained CPU (Z/Z2) and watchdog support - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support - Qualcomm PM8921 PMIC XO buffers - Amlogic migrates to regmap APIs - TI Keystone clk latching support - Allwinner H3 and H5 video clk fixes - Broadcom BCM2835 PLLs needed another bit to enable - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix - i.MX6UL/ULL epdc_podf support - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits) clk: davinci: add a reset lookup table for psc0 clk: imx: add clock driver for imx6sll dt-bindings: imx: update clock doc for imx6sll clk: imx: add new gate/gate2 wrapper funtion clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux clk: cs2000: set pm_ops in hibernate-compatible way clk: bcm2835: De-assert/assert PLL reset signal when appropriate clk: imx7d: Move clks_init_on before any clock operations clk: imx7d: Correct ahb clk parent select clk: imx7d: Correct dram pll type clk: imx7d: Add USB clock information clk: socfpga: stratix10: add clock driver for Stratix10 platform dt-bindings: documentation: add clock bindings information for Stratix10 clk: ti: fix flag space conflict with clkctrl clocks clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: Add driver for the si544 clock generator chip clk: davinci: Remove redundant dev_err calls clk: uniphier: add ethernet clock control support for PXs3 ...
| * dt-bindings: clock: mediatek: add audsys support for MT2701Ryder Lee2018-03-191-0/+1
| | | | | | | | | | | | | | This patch adds a compatible string for MT2701. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * dt-bindings: clock: mediatek: update audsys documentation to adapt MFD deviceRyder Lee2018-03-191-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | The MediaTek audio hardware block that exposes functionalities that are handled by separate subsystems in the kernel. These functions are all mapped somewhere at 0x112xxxxx, and there are some control bits are mixed up with other functions within the same registers. This patch modifies example to illustrate child nodes. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* | Merge tag 'pci-v4.17-changes' of ↵Linus Torvalds2018-04-071-0/+33
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - move pci_uevent_ers() out of pci.h (Michael Ellerman) - skip ASPM common clock warning if BIOS already configured it (Sinan Kaya) - fix ASPM Coverity warning about threshold_ns (Gustavo A. R. Silva) - remove last user of pci_get_bus_and_slot() and the function itself (Sinan Kaya) - add decoding for 16 GT/s link speed (Jay Fang) - add interfaces to get max link speed and width (Tal Gilboa) - add pcie_bandwidth_capable() to compute max supported link bandwidth (Tal Gilboa) - add pcie_bandwidth_available() to compute bandwidth available to device (Tal Gilboa) - add pcie_print_link_status() to log link speed and whether it's limited (Tal Gilboa) - use PCI core interfaces to report when device performance may be limited by its slot instead of doing it in each driver (Tal Gilboa) - fix possible cpqphp NULL pointer dereference (Shawn Lin) - rescan more of the hierarchy on ACPI hotplug to fix Thunderbolt/xHCI hotplug (Mika Westerberg) - add support for PCI I/O port space that's neither directly accessible via CPU in/out instructions nor directly mapped into CPU physical memory space. This is fairly intrusive and includes minor changes to interfaces used for I/O space on most platforms (Zhichang Yuan, John Garry) - add support for HiSilicon Hip06/Hip07 LPC I/O space (Zhichang Yuan, John Garry) - use PCI_EXP_DEVCTL2_COMP_TIMEOUT in rapidio/tsi721 (Bjorn Helgaas) - remove possible NULL pointer dereference in of_pci_bus_find_domain_nr() (Shawn Lin) - report quirk timings with dev_info (Bjorn Helgaas) - report quirks that take longer than 10ms (Bjorn Helgaas) - add and use Altera Vendor ID (Johannes Thumshirn) - tidy Makefiles and comments (Bjorn Helgaas) - don't set up INTx if MSI or MSI-X is enabled to align cris, frv, ia64, and mn10300 with x86 (Bjorn Helgaas) - move pcieport_if.h to drivers/pci/pcie/ to encapsulate it (Frederick Lawler) - merge pcieport_if.h into portdrv.h (Bjorn Helgaas) - move workaround for BIOS PME issue from portdrv to PCI core (Bjorn Helgaas) - completely disable portdrv with "pcie_ports=compat" (Bjorn Helgaas) - remove portdrv link order dependency (Bjorn Helgaas) - remove support for unused VC portdrv service (Bjorn Helgaas) - simplify portdrv feature permission checking (Bjorn Helgaas) - remove "pcie_hp=nomsi" parameter (use "pci=nomsi" instead) (Bjorn Helgaas) - remove unnecessary "pcie_ports=auto" parameter (Bjorn Helgaas) - use cached AER capability offset (Frederick Lawler) - don't enable DPC if BIOS hasn't granted AER control (Mika Westerberg) - rename pcie-dpc.c to dpc.c (Bjorn Helgaas) - use generic pci_mmap_resource_range() instead of powerpc and xtensa arch-specific versions (David Woodhouse) - support arbitrary PCI host bridge offsets on sparc (Yinghai Lu) - remove System and Video ROM reservations on sparc (Bjorn Helgaas) - probe for device reset support during enumeration instead of runtime (Bjorn Helgaas) - add ACS quirk for Ampere (née APM) root ports (Feng Kan) - add function 1 DMA alias quirk for Marvell 88SE9220 (Thomas Vincent-Cross) - protect device restore with device lock (Sinan Kaya) - handle failure of FLR gracefully (Sinan Kaya) - handle CRS (config retry status) after device resets (Sinan Kaya) - skip various config reads for SR-IOV VFs as an optimization (KarimAllah Ahmed) - consolidate VPD code in vpd.c (Bjorn Helgaas) - add Tegra dependency on PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) - add DT support for R-Car r8a7743 (Biju Das) - fix a PCI_EJECT vs PCI_BUS_RELATIONS race condition in Hyper-V host bridge driver that causes a general protection fault (Dexuan Cui) - fix Hyper-V host bridge hang in MSI setup on 1-vCPU VMs with SR-IOV (Dexuan Cui) - fix Hyper-V host bridge hang when ejecting a VF before setting up MSI (Dexuan Cui) - make several structures static (Fengguang Wu) - increase number of MSI IRQs supported by Synopsys DesignWare bridges from 32 to 256 (Gustavo Pimentel) - implemented multiplexed IRQ domain API and remove obsolete MSI IRQ API from DesignWare drivers (Gustavo Pimentel) - add Tegra power management support (Manikanta Maddireddy) - add Tegra loadable module support (Manikanta Maddireddy) - handle 64-bit BARs correctly in endpoint support (Niklas Cassel) - support optional regulator for HiSilicon STB (Shawn Guo) - use regulator bulk API for Qualcomm apq8064 (Srinivas Kandagatla) - support power supplies for Qualcomm msm8996 (Srinivas Kandagatla) * tag 'pci-v4.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (123 commits) MAINTAINERS: Add John Garry as maintainer for HiSilicon LPC driver HISI LPC: Add ACPI support ACPI / scan: Do not enumerate Indirect IO host children ACPI / scan: Rename acpi_is_serial_bus_slave() for more general use HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings of: Add missing I/O range exception for indirect-IO devices PCI: Apply the new generic I/O management on PCI IO hosts PCI: Add fwnode handler as input param of pci_register_io_range() PCI: Remove __weak tag from pci_register_io_range() MAINTAINERS: Add missing /drivers/pci/cadence directory entry fm10k: Report PCIe link properties with pcie_print_link_status() net/mlx5e: Use pcie_bandwidth_available() to compute bandwidth net/mlx5: Report PCIe link properties with pcie_print_link_status() net/mlx4_core: Report PCIe link properties with pcie_print_link_status() PCI: Add pcie_print_link_status() to log link speed and whether it's limited PCI: Add pcie_bandwidth_available() to compute bandwidth available to device misc: pci_endpoint_test: Handle 64-bit BARs properly PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearing PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar ...
| * | HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindingsZhichang Yuan2018-04-041-0/+33
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The low-pin-count (LPC) interface of Hip06/Hip07 accesses I/O port space of peripherals. Implement the LPC host controller driver which performs the I/O operations on the underlying hardware. We don't want to touch existing drivers such as ipmi-bt, so this driver applies the indirect-IO introduced in the previous patch after registering an indirect-IO node to the indirect-IO devices list which will be searched by the I/O accessors to retrieve the host-local I/O port. The driver config is set as a bool instead of a tristate. The reason here is that, by the very nature of the driver providing a logical PIO range, it does not make sense to have this driver as a loadable module. Another more specific reason is that the Huawei D03 board which includes Hip06 SoC requires the LPC bus for UART console, so should be built in. Tested-by: dann frazier <dann.frazier@canonical.com> Signed-off-by: Zou Rongrong <zourongrong@huawei.com> Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Rob Herring <robh@kernel.org> # dts part
* | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2018-04-063-22/+185
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "The main addition this time around is the new ARM "SCMI" framework, which is the latest in a series of standards coming from ARM to do power management in a platform independent way. This has been through many review cycles, and it relies on a rather interesting way of using the mailbox subsystem, but in the end I agreed that Sudeep's version was the best we could do after all. Other changes include: - the ARM CCN driver is moved out of drivers/bus into drivers/perf, which makes more sense. Similarly, the performance monitoring portion of the CCI driver are moved the same way and cleaned up a little more. - a series of updates to the SCPI framework - support for the Mediatek mt7623a SoC in drivers/soc - support for additional NVIDIA Tegra hardware in drivers/soc - a new reset driver for Socionext Uniphier - lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and drivers/firmware and drivers/reset across platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits) reset: uniphier: add ethernet reset control support for PXs3 reset: stm32mp1: Enable stm32mp1 reset driver dt-bindings: reset: add STM32MP1 resets reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency reset: modify the way reset lookup works for board files reset: add support for non-DT systems clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove firmware: arm_scmi: prevent accessing rate_discrete uninitialized hwmon: (scmi) return -EINVAL when sensor information is unavailable amlogic: meson-gx-socinfo: Update soc ids soc/tegra: pmc: Use the new reset APIs to manage reset controllers soc: mediatek: update power domain data of MT2712 dt-bindings: soc: update MT2712 power dt-bindings cpufreq: scmi: add thermal dependency soc: mediatek: fix the mistaken pointer accessed when subdomains are added soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC soc: mediatek: avoid hardcoded value with bus_prot_mask dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC ...
| * \ Merge tag 'samsung-drivers-4.17' of ↵Arnd Bergmann2018-03-071-0/+6
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers Pull "Samsung soc drivers changes for v4.17" from Krzysztof Kozłowski: 1. Add SPDX license identifiers. 2. Populate children syscon nodes in PMU driver to properly model HW in DeviceTree. * tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux: soc: samsung: pmu: Populate children syscon nodes soc: samsung: Add SPDX license identifiers to headers memory: samsung: Add SPDX license identifiers
| | * | soc: samsung: pmu: Populate children syscon nodesKrzysztof Kozlowski2018-02-131-0/+6
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The syscon poweroff and restart nodes logically belong to the Power Management Unit so populate possible children. This also requires providing compatibles for Exynos5410 and Exynos7 so the PMU device and its children will be instantiated for them as well. Just like Exynos5433, these chipsets are not yet supported by the PMU driver. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
| * | Merge tag 'scmi-updates-4.17' of ↵Arnd Bergmann2018-03-071-0/+179
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers Pull "ARM SCMI support for v4.17" from Sudeep Holla: ARM System Control and Management Interface(SCMI)[1] is more flexible and easily extensible than any of the existing interfaces. Few existing as well as future ARM platforms provide micro-controllers to abstract various power and other system management tasks which have similar interfaces, both in terms of the functions that are provided by them, and in terms of how requests are communicated to them. There are quite a few protocols like ARM SCPI, TI SCI, QCOM RPM, Nvidia Tegra BPMP, and so on already. This specification is to standardize and avoid any further fragmentation in the design of such interface by various vendors. The current SCMI driver implementation is very basic and initial support. It lacks support for notifications, asynchronous/delayed response, perf/power statistics region and sensor register region. Mailbox is the only form of transport supported currently in the driver. SCMI supports interrupt based mailbox communication, where, on completion of the processing of a message, the caller receives an interrupt as well as polling for completion. SCMI is designed to minimize the dependency on the mailbox/transport hardware. So in terms of SCMI, each channel in the mailbox includes memory area, doorbell and completion interrupt. However the doorbell and completion interrupt is highly mailbox dependent which was bit of controversial as part of SCMI/mailbox discussions. Arnd and me discussed about the few aspects of SCMI and the mailbox framework: 1. Use of mailbox framework for doorbell type mailbox controller: - Such hardware may not require any data to be sent to signal the remote about the presence of a message. The channel will have in-built information on how to trigger the signal to the remote. There are few mailbox controller drivers which are purely doorbell based. e.g.QCOM IPC, STM, Tegra, ACPI PCC,..etc 2. Supporting other mailbox controller: - SCMI just needs a mechanism to signal the remote firmware. Such controller may need fixed message to be sent to trigger a doorbell. In such case we may need to get that data from DT and pass the same to the controller. It's not covered in the current DT binding, but can be extended as optional property in future. However handling notifications may be interesting on such mailbox, but again there is no way to interpret what the data field(remote message) means, it could be a bit mask or a number or don't-care. Arnd mentioned that he doesn't like the way the mailbox binding deals with doorbell-type hardware, but we do have quite a few precedent drivers already and changing the binding to add a data field would not make it any better, but could cause other problems. So he is happy with the status quo of SCMI implementation. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0056a/index.html * tag 'scmi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: cpufreq: scmi: add support for fast frequency switching cpufreq: add support for CPU DVFS based on SCMI message protocol hwmon: add support for sensors exported via ARM SCMI hwmon: (core) Add hwmon_max to hwmon_sensor_types enumeration clk: add support for clocks provided by SCMI firmware: arm_scmi: add device power domain support using genpd firmware: arm_scmi: add per-protocol channels support using idr objects firmware: arm_scmi: refactor in preparation to support per-protocol channels firmware: arm_scmi: add option for polling based performance domain operations firmware: arm_scmi: add support for polling based SCMI transfers firmware: arm_scmi: probe and initialise all the supported protocols firmware: arm_scmi: add initial support for sensor protocol firmware: arm_scmi: add initial support for power protocol firmware: arm_scmi: add initial support for clock protocol firmware: arm_scmi: add initial support for performance protocol firmware: arm_scmi: add scmi protocol bus to enumerate protocol devices firmware: arm_scmi: add common infrastructure and support for base protocol firmware: arm_scmi: add basic driver infrastructure for SCMI dt-bindings: arm: add support for ARM System Control and Management Interface(SCMI) protocol dt-bindings: mailbox: add support for mailbox client shared memory
| | * | dt-bindings: arm: add support for ARM System Control and Management ↵Sudeep Holla2018-02-281-0/+179
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interface(SCMI) protocol This patch adds devicetree binding for System Control and Management Interface (SCMI) Message Protocol used between the Application Cores(AP) and the System Control Processor(SCP). The MHU peripheral provides a mechanism for inter-processor communication between SCP's M3 processor and AP. SCP offers control and management of the core/cluster power states, various power domain DVFS including the core/cluster, certain system clocks configuration, thermal sensors and many others. SCMI protocol is developed as better replacement to the existing SCPI which is not flexible and easily extensible. Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
| * / drivers/bus: Move Arm CCN PMU driverRobin Murphy2018-03-061-22/+0Star
| |/ | | | | | | | | | | | | | | | | | | | | | | The arm-ccn driver is purely a perf driver for the CCN PMU, not a bus driver in the sense of the other residents of drivers/bus/, so let's move it to the appropriate place for SoC PMU drivers. Not to mention moving the documentation accordingly as well. Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | Merge tag 'armsoc-soc' of ↵Linus Torvalds2018-04-063-0/+61
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ...
| * \ Merge tag 'sunxi-core-for-4.17' of ↵Arnd Bergmann2018-03-272-0/+45
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc Pull "Allwinner core changes for 4.17" from Maxime Ripard: Here is our bunch of changes for mach-sunxi for this release cycle. This is basically only about bringing the SMP support to the A80, which has a bug in hardware and cannot use PSCI like the other SoCs we have. * tag 'sunxi-core-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: sunxi: mc-smp: Split out SoC-specific device node lookup sequence ARM: sunxi: mc-smp: Use DT enable-method for sun9i A80 SMP ARM: sunxi: mc-smp: Fix "lookback" typo ARM: sun9i: smp: Support cpu0 hotplug dt-bindings: ARM: sunxi: Document A80 SoC secure SRAM usage by SMP hotplug ARM: sun9i: smp: Support CPU/cluster power down and hotplugging for cpu1~7 ARM: sun9i: Support SMP bring-up on A80
| | * | ARM: sunxi: mc-smp: Use DT enable-method for sun9i A80 SMPChen-Yu Tsai2018-03-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having an early init function check the machine compatible and installing multi-cluster SMP support for the A80 if it matches, use a new cpu enable-method string. This makes the platform support future proof in case anyone manages to add PSCI support. The original init code for the SMP support is changed into the .prepare_cpus callback in the smp_operations structure. Instead of panicing when resources are missing like on some platforms, our code merely guards against engaging SMP or CPU hotplug and returns an error. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| | * | dt-bindings: ARM: sunxi: Document A80 SoC secure SRAM usage by SMP hotplugChen-Yu Tsai2018-02-201-0/+44
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Allwinner A80 SoC the BROM supports hotplugging the primary core (cpu0) by checking two 32bit values at a specific location within the secure SRAM block. This region needs to be reserved and accessible to the SMP code. Document its usage. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
| * / soc: ti: Add pm33xx driver for basic suspend supportDave Gerlach2018-02-271-0/+16
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM335x and AM437x support various low power modes as documented in section 8.1.4.3 of the AM335x Technical Reference Manual and section 6.4.3 of the AM437x Technical Reference Manual. DeepSleep0 mode offers the lowest power mode with limited wakeup sources without a system reboot and is mapped as the suspend state in the kernel. In this state, MPU and PER domains are turned off with the internal RAM held in retention to facilitate the resume process. As part of the boot process, the assembly code is copied over to OCMCRAM so it can be executed to turn of the EMIF and put DDR into self refresh. Both platforms have a Cortex-M3 (WKUP_M3) which assists the MPU in DeepSleep0 entry and exit. WKUP_M3 takes care of the clockdomain and powerdomain transitions based on the intended low power state. MPU needs to load the appropriate WKUP_M3 binary onto the WKUP_M3 memory space before it can leverage any of the PM features like DeepSleep. This loading is handled by the remoteproc driver wkup_m3_rproc. Communication with the WKUP_M3 is handled by a wkup_m3_ipc driver that exposes the specific PM functionality to be used the PM code. In the current implementation when the suspend process is initiated, MPU interrupts the WKUP_M3 to let it know about the intent of entering DeepSleep0 and waits for an ACK. When the ACK is received MPU continues with its suspend process to suspend all the drivers and then jumps to assembly in OCMC RAM. The assembly code puts the external RAM in self-refresh mode, gates the MPU clock, and then finally executes the WFI instruction. Execution of the WFI instruction with MPU clock gated triggers another interrupt to the WKUP_M3 which then continues with the power down sequence wherein the clockdomain and powerdomain transition takes place. As part of the sleep sequence, WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI execution on WKUP_M3 causes the hardware to disable the main oscillator of the SoC and from here system remains in sleep state until a wake source brings the system into resume path. When a wakeup event occurs, WKUP_M3 starts the power-up sequence by switching on the power domains and finally enabling the clock to MPU. Since the MPU gets powered down as part of the sleep sequence in the resume path ROM code starts executing. The ROM code detects a wakeup from sleep and then jumps to the resume location in OCMC which was populated in one of the IPC registers as part of the suspend sequence. Code is based on work by Vaibhav Bedia. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge tag 'armsoc-dt' of ↵Linus Torvalds2018-04-0616-3/+171
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "This is the usual set of changes for device trees, with over 700 non-merged changesets. There is an ongoing set of dtc warning fixes and the usual bugfixes, cleanups and added device support. The most interesting bit as usual is support for new machines listed below: - The Allwinner H6 makes its debut with the Pine-H64 board, and we get two new machines based on its older siblings: the H5 based OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side, we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2 Zero development board (based on H2). - NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972 development board and p2888 CPU module. - The Nuvoton npcm750 is a BMC that was newly added, for now we only support running on the evaluation board. - STmicroelectronics stm32 gains support for the stm32mp157c and two evaluation boards. - The Toradex Colibri board family grows a few members based on the i.MX6ULL variant. - The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family of chips. - The Phytec phyBOARD Mira is a family of industrial boards based on i.MX6. For now, four models get added. - TI am335x based PDU-001 is an industrial embedded machine used for traffic monitoring - The Aspeed platform now supports running on the BMC on the Qualcomm Centriq 2400 server - Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm msm8974 based Galaxy S5 is a rather different phone made by the same company. - The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file for the various boards made by Xilinx themselves, as well as the Digilent Zybo Z7. - The ARM Versatile family now supports the "IB2" interface board. - The Renesas H2 based "Stout" and the H3 based Salvator-X are more evaluation boards named after a kind of beer, as most of them are. The r8a77980 (V3H) based "Condor" apparently doesn't follow that tradition. ;-) - ROC-RK3328-CC is a simple developement board from the Libre Computer Project, based on the Rockchips RK3328 SoC - Haiku is another development board plus Qseven module based on Rockchips RK3368 and made by Theobroma Systems" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits) arm: dts: modify Nuvoton NPCM7xx device tree structure arm: dts: modify Makefile NPCM750 configuration name arm: dts: modify clock binding in NPCM750 device tree arm: dts: modify timer register size in NPCM750 device tree arm: dts: modify UART compatible name in NPCM750 device tree arm: dts: add watchdog device to NPCM750 device tree arm64: dts: uniphier: add ethernet node for PXs3 ARM: dts: uniphier: add pinctrl groups of ethernet for second instance arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+ arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0 arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier arm: dts: armada-385-db-ap: use SPDX-License-Identifier arm: dts: armada-388-rd: use SPDX-License-Identifier arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier arm: dts: armada-370-db: use SPDX-License-Identifier arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs ...
| * \ Merge tag 'v4.17-rockchip-dts64-1' of ↵Arnd Bergmann2018-03-281-0/+12
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 changes for 4.17" from Heiko Stübner: The rk3399 gained support its Cadence displayport controller and some minor additions like pins for 2ch i2s0 and the cif test clocks as well as a default rate for ACLK_VIO that should be 400MHz according to the TRM. The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using that so far. New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM + baseborad from Theobroma Systems and a standalone variant of the Sapphire board, as a lot of people where using that without the Exkavator baseboard. Sapphire also saw a lot of small cleanups of things that are not part of the actual Sapphire board, but the baseboard instead. The rk3399-puma board got i2s and tsadc support and Gru got its DP node enabled. * tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: remove keep-power-in-suspend from sdhci of rk3399-sapphire arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399 arm64: dts: rockchip: add a standalone version of the rk3399 sapphire arm64: dts: rockchip: move rk3399-sapphire pwr_btn to daughterboard arm64: dts: rockchip: move rk3399-sapphire i2s2 to daughterboard arm64: dts: rockchip: move rk3399-sapphire sdio to excavator baseboard arm64: dts: rockchip: enable I2S codec on rk3399-puma-haikou arm64: dts: rockchip: move i2s0 node from baseboard to SoM on rk3399-puma arm64: dts: rockchip: vdd_log on rk3399-sapphire is not an i2c slave arm64: dts: rockchip: add Haikou baseboard with RK3368-uQ7 SoM arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM dt-bindings: add RK3368-uQ7 SoM and EVK base board arm64: dts: rockchip: Fix RK3328 UART DMAs arm64: dts: rockchip: enable DP for rk3399-gru arm64: dts: rockchip: add cdn-dp node for rk3399. arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399 arm64: dts: rockchip: enable tsadc on rk3399-puma arm64: dts: rockchip: add roc-rk3328-cc board arm64: dts: rockchip: Add cif test clocks for rk3399
| | * | arm64: dts: rockchip: add a standalone version of the rk3399 sapphireHeiko Stuebner2018-02-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the sapphire board is a system-on-module and mostly used with the excavator baseboard, it is also possible to use it standalone without any base. So add a board-variant for this type. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Vicente Bergas <vicencb@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | dt-bindings: add RK3368-uQ7 SoM and EVK base boardKlaus Goger2018-02-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RK3368-uQ7 is a Qseven compatible system-on-module by Theobroma Systems. This adds the module and the EVK baseboard "Haikou" Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | arm64: dts: rockchip: add roc-rk3328-cc boardLevin Du2018-02-121-0/+4
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The roc-rk3328-cc is a credit card size single board computer using the Rockchip RK3328 Quad-Core ARM Cortex A53 64-Bit Processor and supporting up to 2GB 2133MHz LPDDR4 memory. It provides eMMC module socket, MicroSD Card slot, USB 2.0/3.0, Gigabit Ethernet, HDMI/CVBS, Infrared Receiver, SPDIF/I2S, and SPI/I2C/UART/PWM interfaces. The devicetree currently supports basic peripherals. Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | Merge tag 'omap-for-v4.17/dt-pt2-signed' of ↵Arnd Bergmann2018-03-271-0/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "Second set of dts changes for omap variants for v4.17" from Tony Lindgren: This series of patches configures few new drivers and adds omap5 specific nodes: - Enable USB OTG mode for xhci on am437x - A series of changes to configure aux control module instance on omap5 mostly to get the audio clocks configured - A series of changes to update droid4 for MDM6600 modem USB PHY and UART1 pinctrl * tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap4-droid4: Configure uart1 pins ARM: dts: omap4-droid4: Configure MDM6600 USB PHY ARM: dts: omap4-droid4: Fix USB PHY port naming ARM: dts: omap5-board-common: Add phandle for mclk clock for twl6040 ARM: dts: omap5: add fref_xtal_ck support ARM: dts: omap5: add support for control module wkup pad config dt-bindings: omap5: ctrl: Support for control module wkup pad config ARM: dts: am43xx: Enable dual-role mode for USB1
| | * | dt-bindings: omap5: ctrl: Support for control module wkup pad configTero Kristo2018-03-201-0/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | The pad configuration area under control module wkup has some miscellaneous config registers, that are not pinmux related. Add new compatible string for this section of control module. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge tag 'qcom-arm64-for-4.17' of ↵Arnd Bergmann2018-03-272-0/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt Pull "Qualcomm ARM64 Updates for v4.17" from Andy Gross: * Fix GIC_CPU_MASK_SIMPLE and SPI5 config on MSM8996 * Add SDM845 and kryo385 documentation * Add MSM8916 cooling maps, cpu frequency scaling, APCS, and A53 PLL * Switch APCS to use mailbox on MSM8916 * Add rmtfs-mem on MSM8996 * tag 'qcom-arm64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: Fix SPI5 config on MSM8996 dt-bindings: qcom: Add SDM845 bindings dt-bindings: arm: Document kryo385 cpu arm64: dts: msm8916: Add cpu cooling maps arm64: dts: msm8996: Add rmtfs sharedmem node arm64: dts: qcom: msm8916: Add CPU frequency scaling support arm64: dts: qcom: msm8916: Add clock properties to the APCS node arm64: dts: qcom: msm8916: Probe the APCS mailbox driver arm64: dts: qcom: msm8916: Add msm8916 A53 PLL DT node arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE()
| | * | dt-bindings: qcom: Add SDM845 bindingsRajendra Nayak2018-03-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a SoC string 'sdm845' for the qualcomm SDM845 SoC Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | dt-bindings: arm: Document kryo385 cpuRajendra Nayak2018-03-091-0/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the compatible string for the Kryo385 cpus found in qualcomm SoCs. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| * | Merge tag 'v4.16-next-dts64' of ↵Arnd Bergmann2018-03-273-0/+5
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt Pull "ARM: mediatek: dts64 updates for v4.16-next" from Matthias Brugger: - mt2712e add auxadc devcie mt7622: - fix clock bindings description - add nodes for mmc, usb, SATA, PCI, ethernet, cpufreq, PMIC mt6380, pinctrl, scpsys and clock devices * tag 'v4.16-next-dts64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt2712: Add auxadc device node. dt-bindings: clock: mediatek: add missing required #reset-cells arm64: dts: mt7622: add mmc related device nodes arm64: dts: mt7622: add usb device nodes arm64: dts: mt7622: add SATA device nodes arm64: dts: mt7622: add PCIe device nodes arm64: dts: mt7622: add ethernet device nodes arm64: dts: mt7622: add flash related device nodes arm64: dts: mt7622: add SoC and peripheral related device nodes arm64: dts: mt7622: turn uart0 clock to real ones arm64: dts: mt7622: add cpufreq related device nodes arm64: dts: mt7622: add PMIC MT6380 related nodes arm64: dts: mt7622: add pinctrl related device nodes arm64: dts: mt7622: add power domain controller device nodes arm64: dts: mt7622: add clock controller device nodes
| | * | dt-bindings: clock: mediatek: add missing required #reset-cellsSean Wang2018-03-183-0/+5
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All ethsys, pciesys and ssusbsys internally include reset controller, so explicitly add back these missing cell definitions to related bindings and examples. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Cc: Rob Herring <robh@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | Merge tag 'v4.16-next-dts32' of ↵Arnd Bergmann2018-03-271-0/+9
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt Pull "ARM: mediatek: dts32 updates for v4.16-next" from Matthias Brugger: mt7623: - fix style issues of the dts - add cpu clock properties - add PCI controller - add mt7623 reference board banapi-r2: - enable missing uarts - fix regulator for mmc - fix USB initialization * tag 'v4.16-next-dts32' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: dts: mt7623: add PCIe related nodes arm: dts: mt7623: use - instead of _ in DT node name arm: dts: mt7623: remove useless property pinctrl-names at node switch@0 arm: dts: mt7623: add related clock properties to cpu[1-3] nodes arm: dts: mt7623: enable three available UARTs on bananapi-r2 arm: dts: mt7623: fix the regulators mmc should use on bananapi-r2 arm: dts: mt7623: fix USB initialization fails on bananapi-r2 dt-bindings: arm: mediatek: add support for more mt7623 reference boards
| | * | dt-bindings: arm: mediatek: add support for more mt7623 reference boardsSean Wang2018-03-121-0/+9
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding document for more mt7623[A,N] reference boards being supported. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | Merge tag 'renesas-dt-bindings-for-v4.17' of ↵Arnd Bergmann2018-03-271-3/+15
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Renesas ARM Based SoC DT Bindings Updates for v4.17" from Simon Horman: * Document the bindings for: - R-Car V3H (r8a77980) SoC - Condor board with V3H (r8a77980) SoC - Stout (ADAS Starterkit) board with R-Car H2 (r8a7790) SoC - R-Car M3-N (r8a77965) SoC - Salvator-X and Salvator-XS boards with R-Car M3-N (r8a77965) SoC * Document that Armadillo-800 is compatibie with R-Mobile A1 (r8a7740) SoC * Document part numbers of Wheat and V3MSK boards * tag 'renesas-dt-bindings-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-X board dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-XS board dt-bindings: arm: Document Renesas V3MSK and Wheat board part numbers dt-bindings: arm: Document SoC compatible value for Armadillo-800 EVA dt-bindings: arm: Document R-Car M3-N SoC DT bindings dt-bindings: arm: Document Renesas H2-based Stout DT bindings dt-bindings: arm: document Condor board bindings dt-bindings: arm: document R8A77980 SoC bindings
| | * | dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-X boardGeert Uytterhoeven2018-02-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Renesas Salvator-X development board can be equipped with an R-Car H3, M3-W, or M3-N SiP, which are pin-compatible. Document board part number and compatible values for the version with R-Car M3-N. The board part number was extracted from a big patch by Takeshi Kihara in the BSP. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: Document Renesas R-Car M3-N-based Salvator-XS boardGeert Uytterhoeven2018-02-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Renesas Salvator-XS development board can be equipped with an R-Car H3, M3-W, or M3-N SiP, which are pin-compatible. Document board part number and compatible values for the version with R-Car M3-N. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: Document Renesas V3MSK and Wheat board part numbersGeert Uytterhoeven2018-02-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT binding documentation for the Renesas V3MSK and Wheat boards lacked board part numbers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: corrected Wheat part number] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: Document SoC compatible value for Armadillo-800 EVAGeert Uytterhoeven2018-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The compatible property of the root node in a DTS for Atmark Techno Armadillo-800 EVA should include the compatible value for the R-Mobile A1 SoC, too. Fixes: d2c2a0776899ba2d ("ARM: shmobile: Add platform device tree bindings documentation") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: Document R-Car M3-N SoC DT bindingsJacopo Mondi2018-02-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings documentation for Renesas R-Car M3-N (r8a77965) SoC. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: Document Renesas H2-based Stout DT bindingsMarek Vasut2018-02-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the Renesas H2 Stout (ADAS Starterkit) device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the Stout board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: document Condor board bindingsSergei Shtylyov2018-02-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the Condor device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the Condor board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | dt-bindings: arm: document R8A77980 SoC bindingsSergei Shtylyov2018-02-121-0/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Document the R-Car V3H (R8A77980) SoC device tree bindings. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | Merge tag 'tegra-for-4.17-dt-bindings' of ↵Arnd Bergmann2018-03-272-0/+18
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt Pull "dt-bindings: Tegra changes for v4.17-rc1" from Thierry Reding: Mostly cleanup of existing bindings and initial support for Tegra194. * tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt/bindings: Fix binding examples for Tegra GMI controller dt-bindings: phy: Clarify ULPI PHY source clock dt-bindings: tegra: Add documentation for nvidia,tegra194-pmc dt-bindings: tegra: Add missing chips and NVIDIA boards
| | * | dt-bindings: tegra: Add documentation for nvidia,tegra194-pmcMikko Perttunen2018-03-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra194 power management controller has one additional register aperture to be specified in the device tree node. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | dt-bindings: tegra: Add missing chips and NVIDIA boardsMikko Perttunen2018-03-081-0/+16
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Add compatibility strings for supported but undocumented Tegra chips (Tegra114/124/132/210/186/194) and reference boards. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | Merge tag 'xilinx-dt-for-4.17' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann2018-03-121-0/+56
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt Pull "arm: Xilinx(Zynq and ZynqMP) DT changes for v4.17" from Michal Simek: - Use SPDX license identifier - Add Xilinx ZynqMP boards zcu100-revC, zcu102-revA/revB/rev1.0, zcu104-revA, zcu106-revA, zcu111-revA, zc1751 dc1/dc2/dc3/dc4 - Add Xilinx Zynq boards cc108, zc770 dc1/dc2/dc3/dc4 - Add Digilent Zybo Z7 - Minor fixes in current DTSes * tag 'xilinx-dt-for-4.17' of https://github.com/Xilinx/linux-xlnx: (22 commits) arm: dts: zynq: Add Digilent Zybo Z7 board arm: zynq: Add support for Xilinx zc770 xm013 dc4 board arm: zynq: Add support for Xilinx zc770 xm012 dc3 board arm: zynq: Add support for Xilinx zc770 xm011 dc2 board arm: zynq: Add support for Xilinx zc770 xm010 dc1 board arm: zynq: Add Xilinx cc108 board arm: zynq: Add missing address node name in microzed board arm: dts: zynq: Use SPDX-License-Identifier arm: zynq: Use i2c-mux instead of i2cswitch for pca9548 arm64: zynqmp: Add support for Xilinx zc1751 arm64: zynqmp: Add support for Xilinx zc12XX boards arm64: zynqmp: Add support for Xilinx zcu111-revA arm64: zynqmp: Add support for Xilinx zcu106-revA arm64: zynqmp: Add support for Xilinx zcu104-revA arm64: zynqmp: Add support for Xilinx zcu102 arm64: zynqmp: Add support for Xilinx zcu100-revC dt-bindings: xilinx: Add description for ZynqMP arm64: zynqmp: Add 8-bit bus width property for ep108 arm64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts arm64: zynqmp: Add SPDX license identifier ...
| | * | arm: dts: zynq: Add Digilent Zybo Z7 boardNobuhiro Iwamatsu2018-03-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add a DTS for the Digilent Zybo Z7 board. This board is the successor board of Zybo, these are almost the same except for ps-clk-frequency specifications. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu@cybertrust.co.jp> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | arm: zynq: Add support for Xilinx zc770 xm013 dc4 boardMichal Simek2018-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, ethernet, i2c, qspi, spi and uart. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | arm: zynq: Add support for Xilinx zc770 xm012 dc3 boardMichal Simek2018-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, 2x i2c, nor flash, spi and uart. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | arm: zynq: Add support for Xilinx zc770 xm011 dc2 boardMichal Simek2018-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, i2c, nand uart, spi and usb. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | arm: zynq: Add support for Xilinx zc770 xm010 dc1 boardMichal Simek2018-03-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains ethernet port, can, i2c, sd, qspi, spi, uart and usb. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | arm: zynq: Add Xilinx cc108 boardMichal Simek2018-03-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board contains 7z010 with 512MB memory, ethernet, qspi, uart, usbs and sd. But board is not supporting booting from sd card. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
| | * | arm64: zynqmp: Add support for Xilinx zc1751Michal Simek2018-03-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx zc1751 boards is used for silicon validation. Board can be extended with 5 FMCs/DCs cards to connect various IPs. Describe all these combinations. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>