summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/pinctrl
Commit message (Collapse)AuthorAgeFilesLines
* dt-bindings: pinctrl: Document the i.MX50 IOMUXC bindingJonathan Neuschäfer2019-02-211-0/+32
| | | | | | | | | | | | AFAICS from the i.MX50 Reference Manual, the i.MX50 IOMUXC works the same as the one in i.MX51, so I copied fsl,imx51-pinctrl.txt and changed the text to imx50. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Cc: Dong Aisheng <dong.aisheng@linaro.org> Cc: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: add documentation for slew rateClaudiu Beznea2019-02-081-0/+1
| | | | | | | | Add documentation for slew rate. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: add bindings for SAM9X60Claudiu Beznea2019-02-081-2/+3
| | | | | | | | Add device tree binding for SAM9X60 pin controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: add documentation for banksClaudiu Beznea2019-02-081-0/+23
| | | | | | | | Add documentation for at91 pin controller banks. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'ib-qcom-spmi' of /home/linus/linux-gpio into develLinus Walleij2019-01-281-0/+1
|\
| * dt-bindings: pinctrl: qcom-pmic-gpio: add qcom,pmi8998-gpio bindingBrian Masney2019-01-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add support for the PMI8998 GPIO variant to the Qualcomm PMIC GPIO binding document. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: imx: Add pinctrl binding doc for imx8mmBai Ping2019-01-281-0/+36
| | | | | | | | | | | | | | | | Add binding doc imx8mm pinctrl driver. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Aisheng Dong <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'ib-meson-fixes' into develLinus Walleij2019-01-221-5/+5
|\ \
| * | dt-bindings: pinctrl: meson: update register descriptionsJerome Brunet2019-01-211-5/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | like pull-enable, pull should be optional has this region is available on every controllers. Also, the g12a feature a new region "ds" for the drive-strength All this region thing is one big mess. I suspect that there is only one big GPIO region with holes in it. All registers between the current regions reads '0' so it is probably just spare space to handle more pins. Since we need to continue to handle the existing controllers, switching to one single region now would not simplify things. However, if more organisation layouts and features keep on being added, we may have to look at this again Fixes: 3cd3c83f6752 ("pinctrl: Add compatibles for Amlogic Meson G12A pin controllers") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: dt-bindings: Fix the armada-37xx documentationGregory CLEMENT2019-01-111-1/+5
| | | | | | | | | | | | | | | | | | While it was possible to configure the PCIe1 Wakeup pin, it was missing in the bidding, let's document it. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: armada-37xx: Correct mpp definitionsMarek Behún2019-01-111-5/+13
|/ | | | | | | | | | | | | | | | | | | | | This is a cleanup and fix of the patch by Ken Ma <make@marvell.com>. Fix the mpp definitions according to newest revision of the specification: - northbridge: fix pmic1 gpio number to 7 fix pmic0 gpio number to 6 - southbridge split pcie1 group bit mask to BIT(5) and BIT(9) fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13) add smi group with bit mask BIT(4) [gregory: split the pcie group in 2, as at hardware level they can be configured separately] Signed-off-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ocelot: add MSCC Jaguar2 supportAlexandre Belloni2018-12-211-1/+2
| | | | | | | | Jaguar2 has the same register layout as Ocelot but it has 64 pins, meaning that there are 2 registers instead of one. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use sysconRafał Miłecki2018-12-211-9/+7Star
| | | | | | | | | | | | | | | | As pointed by Rob, CRU is a kind of block that can't be guaranteed to have everything exposed as subnodes. It's a set of various registers that aren't tied to any single device. It could be described much more accurately as MFD (Multi-Function Device). Some hardware blocks may indeed want to access a register or two of the CRU which requires describing it as the "syscon". While at it replace exmple node name with the standard "pinctrl" (also pointed out by Rob). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: sunxi: Add supply propertiesMaxime Ripard2018-12-211-0/+13
| | | | | | | | The pinctrl node can have multiple regulators for each of its GPIO banks. Add the property descriptions. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: fix qcom-pmic-gpio for pms405Shawn Guo2018-11-261-1/+1
| | | | | | | | | | Rather than gpio1-gpio11 for pms405, there are 12 GPIOs for pms405. But gpio1, gpio9 and gpio10 are not available. Fix the bindings doc to make it correct for pms405. Fixes: ed80f6eb799a ("dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 support") Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'sh-pfc-for-v4.21-tag1' of ↵Linus Walleij2018-11-251-0/+87
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.21 - Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W, - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C, - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3, - Add QSPI pin groups on R-Car V3M and V3H, - Add VIN and CAN(FD) pin groups on R-Car M3-N, - Add I2C[035] pin groups on R-Car H3 and M3-W, - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC, - Small cleanups, - Maintainership updates.
| * dt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIOChris Brandt2018-11-231-0/+87
| | | | | | | | | | | | | | | | | | | | Add device tree binding documentation and header file for Renesas R7S9210 (RZ/A2) SoCs. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | dt-bindings: pinctrl: Add Allwinner suniv F1C100s pinctrlMesih Kilinc2018-11-251-0/+1
| | | | | | | | | | | | | | | | Add compatible string for Allwinner suniv F1C100s SoC's pinctrl. Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: update bindings for MT7629 SoCRyder Lee2018-11-191-0/+131
| | | | | | | | | | | | | | | | | | This updates bindings for MT7629 pinctrl driver. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Sean Wang <sean.wang@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: Add bindings for Actions Semi S700 SoCSaravanan Sekar2018-11-191-0/+170
| | | | | | | | | | | | | | | | | | | | Add pinctrl and pio bindings for Actions Semi S700 SoC. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: stm32: Document hwlocks propertiesBenjamin Gaignard2018-11-191-0/+1
| | | | | | | | | | | | | | Add hwlocks as optional property Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: Add devicetree bindings for MT6797 SoC PinctrlManivannan Sadhasivam2018-11-151-0/+83
| | | | | | | | | | | | | | Add devicetree bindings for Mediatek MT6797 SoC Pin Controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: imx7ulp: back to imx legacy binding for consistencyA.s. Dong2018-11-091-37/+29Star
|/ | | | | | | | | | | | | | | | | | | | We already had an earlier conclusion that all new i.MX Socs will keep using the legacy i.MX Pinctrl bindings instead of generic pin config. However, MX7ULP generic pin config binding support has already been in tree before that time. Per SoC maintainers' suggestions, in order to get a better consistency for all i.MX devices, we'd like to go back to imx legacy binding for MX7ULP as well. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: bcm4708-pinmux: improve example bindingRafał Miłecki2018-10-161-8/+23
| | | | | | | | | | | | Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or "Central Resource Unit") registers. There are more CRU registers and functions so CRU should be represented as a separated block in DT. Moreover CRU is a sub-block of DMU ("Device Management Unit") so that one should also get its own node. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'sh-pfc-for-v4.20-tag3' of ↵Linus Walleij2018-10-101-0/+153
|\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 (take three) - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033) SoCs, - Add INTC-EX pin groups on R-Car E3.
| * dt-bindings: pinctrl: renesas,rzn1-pinctrl: documentationPhil Edworthy2018-10-021-0/+153
| | | | | | | | | | | | | | | | | | | | The Renesas RZ/N1 device family PINCTRL node description. Based on a patch originally written by Michel Pollet at Renesas. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | dt-bindings: pinctrl: document Broadcom Northstar pin mux controllerRafał Miłecki2018-10-101-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | Northstar has mux controller just like Northstar Plus and Northstar2. It's a bit different though (different registers & pins) so it requires its own binding. It's needed to allow other block bindings specify required mux setup. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: qcom: Add SDM660 pinctrl bindingCraig Tatlor2018-10-031-0/+191
| | | | | | | | | | | | | | | | | | Add the binding for the TLMM pinctrl block found in the SDM660 platform. Signed-off-by: Craig Tatlor <ctatlor97@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'sh-pfc-for-v4.20-tag2' of ↵Linus Walleij2018-10-011-0/+2
|\| | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 (take two) - Add MSIOF pin groups on R-Car E3 and D3, - Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs, - Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C, - Convert to SPDX license identifiers, - Small cleanups.
| * dt-bindings: pinctrl: sh-pfc: Document r8a774c0 PFC supportFabrizio Castro2018-09-191-0/+1
| | | | | | | | | | | | | | | | Document PFC support for the R8A774C0 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * dt-bindings: pinctrl: sh-pfc: Document r8a7744 PFC supportBiju Das2018-09-191-0/+1
| | | | | | | | | | | | | | | | | | Document PFC support for the RZ/G1N (R8A7744) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | dt-bindings: pinctrl: qcom: Add QCS404 pinctrl bindingBjorn Andersson2018-09-261-0/+199
| | | | | | | | | | | | | | | | Add the binding for the TLMM pinctrl block found in the QCS404 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 supportVinod Koul2018-09-261-0/+2
| | | | | | | | | | | | | | | | | | Add support for the PMS405 GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge tag 'sh-pfc-for-v4.20-tag1' of ↵Linus Walleij2018-08-311-0/+1
|\| | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 - Add SATA and audio pin groups on R-Car M3-N, - Add EtherAVB pin groups on RZ/G1C, - Add PWM and display (DU) pin groups on R-Car E3, - Add support for the new RZ/G2M (r8a774a1) SoC.
| * dt-bindings: pinctrl: sh-pfc: Document r8a774a1 PFC supportBiju Das2018-08-281-0/+1
| | | | | | | | | | | | | | | | | | | | Document PFC support for the R8A774A1 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | Merge branch 'ib-ingenic' into develLinus Walleij2018-08-291-4/+35
|\ \
| * | dt-bindings: pinctrl: Update pinctrl-ingenic for JZ4725B and GPIO mergePaul Cercueil2018-08-291-4/+35
| |/ | | | | | | | | | | | | | | | | | | | | The pinctrl-ingenic driver now supports the JZ4725B SoC. Furthermore, the gpio-ingenic driver was dropped and the pinctrl-ingenic driver is now responsible for providing the GPIO functionality. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: Add compatibles for Amlogic Meson G12A pin controllersYixun Lan2018-08-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | Add new compatible name for Amlogic's Meson-G12A pin controllers, add a dt-binding header file which document the detail pin names. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-binding: pinctrl: Add NPCM7xx pinctrl and GPIO documentationTomer Maimon2018-08-291-0/+216
|/ | | | | | | | | Added device tree binding documentation for Nuvoton BMC NPCM750/730/715/705 pinmux and GPIO controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'mfd-next-4.19' of ↵Linus Torvalds2018-08-211-0/+99
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver - Add ChromeOS EC CEC driver - Add ROHM BD71837 PMIC driver New Device Support: - Add support for Dialog Semi DA9063L PMIC variant to DA9063 - Add support for Intel Ice Lake to Intel-PLSS-PCI - Add support for X-Powers AXP806 to AXP20x New Functionality: - Add support for USB Charging to the ChromeOS Embedded Controller - Add support for HDMI CEC to the ChromeOS Embedded Controller - Add support for HDMI CEC to Intel HDMI - Add support for accessory detection to Madera devices - Allow individual pins to be configured via DT' wlf,csnaddr-pd - Provide legacy platform specific EEPROM/Watchdog commands; rave-sp Fix-upsL - Trivial renaming/spelling fixes; cros_ec, da9063-* - Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc - Transition to helper macros/functions; da9063-* - Constify; kempld-core - Improve error path/messages; wm8994-core - Disable IRQs locally instead of relying on USB subsystem; dln2 - Remove unused code; rave-sp - New exports; sec-core Bug Fixes: - Fix possible false I2C transaction error; arizona-core - Fix declared memory area size; hi655x-pmic - Fix checksum type; rave-sp - Fix incorrect default serial port configuration: rave-sp - Fix incorrect coherent DMA mask for sub-devices; sm501" * tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits) mfd: madera: Add register definitions for accessory detect mfd: sm501: Set coherent_dma_mask when creating subdevices mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC mfd: bd71837: Core driver for ROHM BD71837 PMIC media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC mfd: sec-core: Export OF module alias table mfd: as3722: Disable auto-power-on when AC OK mfd: axp20x: Support AXP806 in I2C mode mfd: axp20x: Add self-working mode support for AXP806 dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806 mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts mfd: wm8994: Allow to configure Speaker Mode Pullup from dts mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it mfd: rave-sp: Add legacy watchdog ping command translation mfd: rave-sp: Add legacy EEPROM access command translation mfd: rave-sp: Initialize flow control and parity of the port mfd: rave-sp: Fix incorrectly specified checksum type mfd: rave-sp: Remove unused defines mfd: hi655x: Fix regmap area declared size for hi655x mfd: ti_am335x_tscadc: Fix struct clk memory leak ...
| * Merge branches 'ib-mfd-4.19', 'ib-mfd-gpio-pinctrl-4.19', ↵Lee Jones2018-07-271-0/+99
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'ib-mfd-i915-media-platform-4.19' and 'ib-mfd-regulator-4.19', tag 'ib-platform-chrome-mfd-move-cros-ec-transport-for-4.19' into ibs-for-mfd-merged Immutable branch (mfd, chrome) due for the v4.19 window Immutable Branch which moves the cros_ec_i2c and cros_ec_spi transport drivers from mfd to platform/chrome. Changes in arm are a simple rename in defconfigs. Change in input is a rename in help text.
| | * pinctrl: madera: Add DT bindings for Cirrus Logic Madera codecsRichard Fitzgerald2018-06-051-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the binding description of the pinctrl driver for Cirrus Logic Madera codecs. The binding uses the generic pinctrl binding so the main purpose here is to describe the device-specific names for groups and functions. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | | Merge tag 'driver-core-4.19-rc1' of ↵Linus Torvalds2018-08-181-0/+6
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg KH: "Here are all of the driver core and related patches for 4.19-rc1. Nothing huge here, just a number of small cleanups and the ability to now stop the deferred probing after init happens. All of these have been in linux-next for a while with only a merge issue reported" * tag 'driver-core-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (21 commits) base: core: Remove WARN_ON from link dependencies check drivers/base: stop new probing during shutdown drivers: core: Remove glue dirs from sysfs earlier driver core: remove unnecessary function extern declare sysfs.h: fix non-kernel-doc comment PM / Domains: Stop deferring probe at the end of initcall iommu: Remove IOMMU_OF_DECLARE iommu: Stop deferring probe at end of initcalls pinctrl: Support stopping deferred probe after initcalls dt-bindings: pinctrl: add a 'pinctrl-use-default' property driver core: allow stopping deferred probe after init driver core: add a debugfs entry to show deferred devices sysfs: Fix internal_create_group() for named group updates base: fix order of OF initialization linux/device.h: fix kernel-doc notation warning Documentation: update firmware loader fallback reference kobject: Replace strncpy with memcpy drivers: base: cacheinfo: use OF property_read_u32 instead of get_property,read_number kernfs: Replace strncpy with memcpy device: Add #define dev_fmt similar to #define pr_fmt ...
| * | | dt-bindings: pinctrl: add a 'pinctrl-use-default' propertyRob Herring2018-07-101-0/+6
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pin setup may be optional in some cases such as the reset default works or the pin setup is done by the bootloader. In these cases, it is optional for the OS to support managing the pin controller and pin setup. In order to support this scenario, add a property 'pinctrl-use-default' to indicate that the pin configuration is optional. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge tag 'devicetree-for-4.19' of ↵Linus Torvalds2018-08-146-14/+2Star
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree updates from Rob Herring: - Remove an obsolete hack for PPC32 longtrail systems - Make of_io_request_and_map() "name" arg optional - Add vendor prefixes for bitmain, Asus, and Y Soft - Remove 'interrupt-parent' from bindings as it is implicit - New properties for wm8994 audio codec - Add 'clocks' property support to SRAM binding - Add binding for ASPEED coprocessor interrupt controller - Various binding spelling and link fixes * tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: Documentation: remove dynamic-resolution-notes reference to non-existent file dt-bindings: Add Y Soft Corporation vendor prefix of/fdt: Remove PPC32 longtrail hack in memory scan dt-bindings: remove 'interrupt-parent' from bindings pinctrl: tegra: fix spelling in devicetree binding document usb: dwc3: rockchip: Fix PHY documentation links. dt-bindings: sound: wm8994: document wlf,csnaddr-pd property dt-bindings: sound: wm8994: document wlf,spkmode-pu property dt-bindings: sram: Add 'clocks' as an optional property dt-bindings: Add vendor prefix for AsusTek Computer Inc. dt-bindings: misc: ASPEED coprocessor interrupt controller dt-bindings: gpio: pca953x: Document interrupts, update example drivers/of: Make of_io_request_and_map() "name" argument optional dt-bindings: Add bitmain vendor prefix Documentation: devicetree: tilcdc: fix spelling mistake "suppors" -> "supports"
| * | | dt-bindings: remove 'interrupt-parent' from bindingsRob Herring2018-07-254-12/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'interrupt-parent' is often documented as part of define bindings, but it is really outside the scope of a device binding. It's never required in a given node as it is often inherited from a parent node. Or it can be implicit if a parent node is an 'interrupt-controller' node. So remove it from all the binding files. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
| * | | pinctrl: tegra: fix spelling in devicetree binding documentMarcel Ziswiler2018-07-252-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | This fixes a spelling mistake. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
* | | dt-bindings: pinctrl: add syscfg mask parameterLudovic Barre2018-07-291-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds mask parameter to define IRQ mux field. This field could vary depend of IRQ mux selection register. This parameter is needed if the mask is different of 0xf. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: stm32: fix bank io port numberAlexandre Torgue2018-07-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the exti line is not in line with the bank number (that is the case when there is an hole between two banks, for example GPIOK and then GPIOZ), use "st,bank-ioport" DT property to get the right exti line. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'samsung-pinctrl-4.19' of ↵Linus Walleij2018-07-251-2/+9
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v4.19 1. Add handling of external wakeup interrupts mask inside the pin controller driver. Existing solution is spread between the driver and machine code. The machine code writes the mask but its value is taken from pin controller driver. This moves everything into pin controller driver allowing later to remove the cross-subsystem interaction. Also this is a necessary step for implementing later Suspend to RAM on ARMv8 Exynos5433. 2. Bring necessary suspend/resume callbacks for Exynos542x and Exynos5260. 3. Document hidden requirement about one external wakeup interrupts device node. 4. Minor documentation cleanups.
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-12 10:25:11 +0200