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* dt-bindings: pinctrl: stm32: Fix 'st,syscfg' schemaRob Herring2019-08-151-1/+2
| | | | | | | | | | | | | | | The proper way to add additional contraints to an existing json-schema is using 'allOf' to reference the base schema. Using just '$ref' doesn't work. Fix this for the 'st,syscfg' property. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-gpio@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
* dt-bindings: pinctrl: stm32: Fix missing 'clocks' property in examplesRob Herring2019-07-211-0/+4
| | | | | | | | | | | | | | | | | | | | | | Now that examples are validated against the DT schema, an error with required 'clocks' property missing is exposed: Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@40020000: gpio@0: 'clocks' is a required property Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@50020000: gpio@1000: 'clocks' is a required property Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@50020000: gpio@2000: 'clocks' is a required property Add the missing 'clocks' properties to the examples to fix the errors. Fixes: 2c9239c125f0 ("dt-bindings: pinctrl: Convert stm32 pinctrl bindings to json-schema") Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Rob Herring <robh@kernel.org>
* dt-bindings: pinctrl: aspeed: Fix AST2500 example errorsRob Herring2019-07-211-4/+1Star
| | | | | | | | | | | | | | | | | | | | The schema examples are now validated against the schema itself. The AST2500 pinctrl schema has a couple of errors: Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \ example-0: $nodename:0: 'example-0' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \ pinctrl: aspeed,external-nodes: [[1, 2]] is too short Fixes: 0a617de16730 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema") Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Joel Stanley <joel@jms.id.au> Cc: linux-aspeed@lists.ozlabs.org Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Rob Herring <robh@kernel.org>
* dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errorsRob Herring2019-07-212-2/+6
| | | | | | | | | | | | | | | | | | | | | | | The Aspeed pinctl schema have errors in the 'compatible' schema: Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml: \ properties:compatible:enum: ['aspeed', 'ast2400-pinctrl', 'aspeed', 'g4-pinctrl'] has non-unique elements Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml: \ properties:compatible:enum: ['aspeed', 'ast2500-pinctrl', 'aspeed', 'g5-pinctrl'] has non-unique elements Flow style sequences have to be quoted if the vales contain ','. Fix this by using the more common one line per entry formatting. Fixes: 0a617de16730 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema") Fixes: 07457937bb5c ("dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema") Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Joel Stanley <joel@jms.id.au> Cc: linux-aspeed@lists.ozlabs.org Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Rob Herring <robh@kernel.org>
* dt-bindings: Ensure child nodes are of type 'object'Rob Herring2019-07-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Properties which are child node definitions need to have an explict type. Otherwise, a matching (DT) property can silently match when an error is desired. Fix this up tree-wide. Once this is fixed, the meta-schema will enforce this on any child node definitions. Cc: Chen-Yu Tsai <wens@csie.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: linux-mtd@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-spi@vger.kernel.org Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Rob Herring <robh@kernel.org>
* Merge tag 'pinctrl-v5.3-1' of ↵Linus Torvalds2019-07-1427-424/+955
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.3 kernel cycle: Core changes: - Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended. This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run. Right now it is opt-in per driver. - Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps. Right now the Meson (AMlogic) driver needs this. New drivers: - New subdriver for the Tegra 194 SoC. - New subdriver for the Qualcomm SDM845. - New subdriver for the Qualcomm SM8150. - New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP). - New subdriver for Marvell MV98DX1135. Driver improvements: - The Bitmain BM1880 driver now supports pin config in addition to muxing. - The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine. - A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC. - A slew of improvements over the SH PFC drivers as usual. - Misc cleanups and fixes" * tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits) pinctrl: aspeed: Strip moved macros and structs from private header pinctrl: aspeed: Fix missed include pinctrl: baytrail: Use GENMASK() consistently pinctrl: baytrail: Re-use data structures from pinctrl-intel.h pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux() pinctrl: qcom: Add SM8150 pinctrl driver dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding dt-bindings: pinctrl: qcom: Document missing gpio nodes pinctrl: aspeed: Add implementation-related documentation pinctrl: aspeed: Split out pinmux from general pinctrl pinctrl: aspeed: Clarify comment about strapping W1C pinctrl: aspeed: Correct comment that is no longer true MAINTAINERS: Add entry for ASPEED pinctrl drivers dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema dt-bindings: pinctrl: aspeed: Split bindings document in two pinctrl: qcom: Add irq_enable callback for msm gpio pinctrl: madera: Fixup SPDX headers pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard pinctrl: tegra: Add bitmask support for parked bits ...
| * dt-bindings: pinctrl: qcom: Add SM8150 pinctrl bindingPrasad Sodagudi2019-07-041-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the binding for the TLMM pinctrl block found in the SM8150 platform. Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org> Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org> [vkoul: add missing nodes of gpio range and reserved rewrote function names and order them] Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190702105045.27646-3-vkoul@kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: qcom: Document missing gpio nodesVinod Koul2019-07-041-0/+10
| | | | | | | | | | | | | | | | | | | | The bindings for msm8998-pinctrl was missing gpio-ranges and gpio-reserved-ranges, so document them as well Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190702105045.27646-2-vkoul@kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schemaAndrew Jeffery2019-07-032-119/+134
| | | | | | | | | | | | | | | | | | Convert ASPEED pinctrl bindings to DT schema format using json-schema. Cc: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190628023838.15426-4-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schemaAndrew Jeffery2019-07-032-80/+81
| | | | | | | | | | | | | | | | | | | | Convert ASPEED pinctrl bindings to DT schema format using json-schema Cc: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190628023838.15426-3-andrew@aj.id.au Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: aspeed: Split bindings document in twoAndrew Jeffery2019-07-032-58/+85
| | | | | | | | | | | | | | | | | | | | | | Have one for each of the AST2400 and AST2500. The only thing that was common was the fact that both support ASPEED BMC SoCs. Cc: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20190628023838.15426-2-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: mvebu: Document bindings for 98DX1135Chris Packham2019-06-251-2/+42
| | | | | | | | | | | | | | | | The 98DX1135 is similar to the 98DX4122 except the MPP options differ. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: imx: Add pinctrl binding doc for i.MX8MNAnson Huang2019-06-251-0/+39
| | | | | | | | | | | | | | | | Add binding doc for i.MX8MN pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: add compatible string for Allwinner V3 pinctrlIcenowy Zheng2019-06-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The Allwinner V3 SoC, despite come with the same die with V3s, has more GPIO pins than V3s, and a different compatible string for pinctrl is needed. Add the compatible string for V3 pinctrl. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: add missing compatible string for V3sIcenowy Zheng2019-06-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The pinctrl driver of V3s is already available and used in the kernel, but the compatible string of it is forgotten to be added. Add the missing compatible string. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: pic32: Spelling s/configuraion/configuration/Geert Uytterhoeven2019-06-081-1/+1
| | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: aspeed: Add SGPM pinmuxHongwei Zhang2019-06-081-1/+1
| | | | | | | | | | | | | | | | | | Add SGPM pinmux to ast2500-pinctrl function and group, to prepare for supporting SGPIO in AST2500 SoC. Signed-off-by: Hongwei Zhang <hongweiz@ami.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: qcom: sdm845: Expose ufs_reset as gpioBjorn Andersson2019-06-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | The ufs_reset pin is expected to be wired to the reset pin of the primary UFS memory but is pretty much just a general purpose output pinr Reorder the pins and expose it as gpio 150, so that the UFS driver can toggle it. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: Document drive strength settings for BM1880 SoCManivannan Sadhasivam2019-06-081-0/+11
| | | | | | | | | | | | | | Document drive strength settings for Bitmain BM1880 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: imx: Correct pinfunc head file path for i.MX8MMAnson Huang2019-06-081-1/+1
| | | | | | | | | | | | | | The i.MX8MM pinfunc head file is located in DT folder, correct it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: Add Tegra194 pinctrl DT bindingsKrishna Yarlagadda2019-06-011-0/+107
| | | | | | | | | | | | | | | | | | Add binding doc for Tegra 194 pinctrl driver. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Tested-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: fix spelling mistakes in pinctl documentationColin Ian King2019-05-2711-33/+33
| | | | | | | | | | | | | | | | The spelling of configured is incorrect in the documentation. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: Document pinconf bindings for BM1880 SoCManivannan Sadhasivam2019-05-241-1/+18
| | | | | | | | | | | | | | Document pinconf bindings for Bitmain BM1880 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: Modify pinctrl memory mapManivannan Sadhasivam2019-05-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | Earlier, the PWM registers were included as part of the pinctrl memory map, but this turned to be useless as the muxing is being handled by the SoC pin controller itself. So, lets modify the pinctrl memory map to reflect the same. Fixes: 07b734fbdea2 ("dt-bindings: pinctrl: Add BM1880 pinctrl binding") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: meson: add output support in pinconfJerome Brunet2019-05-241-3/+9
| | | | | | | | | | | | | | | | add support for the pinconf DT property output-enable, output-disable, output-low and output-high in the meson pinctrl driver. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: Convert stm32 pinctrl bindings to json-schemaAlexandre Torgue2019-05-242-208/+264
| | | | | | | | | | | | | | | | Convert the STM32 pinctrl binding to DT schema format using json-schema. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: bcm2835-gpio: Document BCM7211 compatibleFlorian Fainelli2019-05-231-0/+3
| | | | | | | | | | | | | | | | | | BCM7211 has a slightly different block layout and some additional GPIO registers that were added, document the compatible string. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: meson: Add drive-strength-microamp propertyGuillaume La Roque2019-05-231-0/+4
| | | | | | | | | | | | | | | | | | Add optional drive-strength-microamp property Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * dt-bindings: pinctrl: add a 'drive-strength-microamp' propertyGuillaume La Roque2019-05-231-0/+3
| | | | | | | | | | | | | | | | | | | | This property allow drive-strength parameter in uA instead of mA. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: Add missing newline at end of fileGeert Uytterhoeven2019-06-181-1/+1
|/ | | | | | | | | | | "git diff" says: \ No newline at end of file after modifying the files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rob Herring <robh@kernel.org>
* Merge tag 'mfd-next-5.2' of ↵Linus Torvalds2019-05-141-0/+116
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "Core Framework: - Document (kerneldoc) core mfd_add_devices() API New Drivers: - Altera SOCFPGA System Manager - Maxim MAX77650/77651 PMIC - Maxim MAX77663 PMIC - ST Multi-Function eXpander (STMFX) New Device Support: - LEDs support in Intel Cherry Trail Whiskey Cove PMIC - RTC support in SAMSUNG Electronics S2MPA01 PMIC - SAM9X60 support in Atmel HLCDC (High-end LCD Controller) - USB X-Powers AXP 8xx PMICs - Integrated Sensor Hub (ISH) in ChromeOS EC - USB PD Logger in ChromeOS EC - AXP223 in X-Powers AXP series PMICs - Power Supply in X-Powers AXP 803 PMICs - Comet Lake in Intel Low Power Subsystem - Fingerprint MCU in ChromeOS EC - Touchpad MCU in ChromeOS EC - Move TI LM3532 support to LED New Functionality: - max77650, max77620: Add/extend DT support - max77620 power-off - syscon clocking - croc_ec host sleep event Fix-ups: - Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs - Remove unused functionality; rk808, da9063-* - SPDX conversion; da9063-*, atmel-*, - Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr - Fix-up DT bindings; ti-lmu, cirrus,lochnagar - Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb Bug Fixes: - Fix incorrect defined values; max77620, da9063 - Fix device initialisation; twl6040 - Reset device on init; intel-lpss - Fix build warnings when !OF; sun6i-prcm - Register OF match tables; tps65912-spi - Fix DMI matching; intel_quark_i2c_gpio" * tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits) mfd: Use dev_get_drvdata() directly mfd: cros_ec: Instantiate properly CrOS Touchpad MCU device mfd: cros_ec: Instantiate properly CrOS FP MCU device mfd: cros_ec: Update the EC feature codes mfd: intel-lpss: Add Intel Comet Lake PCI IDs mfd: lochnagar: Add links to binding docs for sound and hwmon mfd: ab8500-debugfs: Fix a typo ("deubgfs") mfd: imx6sx: Add MQS register definition for iomuxc gpr dt-bindings: mfd: LMU: Fix lm3632 dt binding example mfd: intel_quark_i2c_gpio: Adjust IOT2000 matching mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L mfd: tps65912-spi: Add missing of table registration mfd: axp20x: Add USB power supply mfd cell to AXP803 mfd: sun6i-prcm: Fix build warning for non-OF configurations mfd: intel-lpss: Set the device in reset state when init platform/chrome: Add support for v1 of host sleep event mfd: cros_ec: Add host_sleep_event_v1 command mfd: cros_ec: Instantiate the CrOS USB PD logger driver mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable mfd: cs47l35: Make DAC_AEC_CONTROL_2 readable ...
| * dt-bindings: pinctrl: document the STMFX pinctrl bindingsAmelie Delaunay2019-05-101-0/+116
| | | | | | | | | | | | | | | | | | | | This patch adds documentation of device tree bindings for the STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | Merge tag 'pinctrl-v5.2-1' of ↵Linus Torvalds2019-05-086-3/+377
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "It is pretty calm and chill in pin control for the moment. Just incremental development. There is an odd patch to the Super-H architecture, it's coming from the maintainers so should be fine. Summary: New drivers: - Bitmain BM1880 pin controller - Mediatek MT8516 - Cirrus Logich Lochnagar PMIC pins Updates: - Incremental development on Renesas SH-PFC - Incremental development on Intel pin controller and some particular updates for Cedarfork. - Pin configuration support in Allwinner SunXi drivers - Suspend/resume support in the NXP/Freescale i.MX8MQ driver - Support for more packaging of the ST Micro STM32" * tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits) pinctrl: mcp23s08: Do not complain about unsupported params pinctrl: Rework Kconfig dependency for BM1880 pinctrl driver MAINTAINERS: Add entry for BM1880 pinctrl pinctrl: Add pinctrl support for BM1880 SoC dt-bindings: pinctrl: Add BM1880 pinctrl binding pinctrl: stm32: check irq controller availability at probe pinctrl: mediatek: Add MT8516 Pinctrl driver pinctrl: zte: fix leaked of_node references pinctrl: intel: Increase readability of intel_gpio_update_pad_mode() pinctrl: intel: Retain HOSTSW_OWN for requested gpio pin pinctrl: pistachio: fix leaked of_node references pinctrl: sunxi: Support I/O bias voltage setting on H6 pinctrl: sunxi: Prepare for alternative bias voltage setting methods pinctrl: st: fix leaked of_node references pinctrl: samsung: fix leaked of_node references pinctrl: stm32: align stm32mp157 pin names pinctrl: stm32: add package information for stm32mp157c pinctrl: stm32: introduce package support dt-bindings: pinctrl: stm32: add new entry for package information pinctrl: imx8mq: Add suspend/resume ops ...
| * | dt-bindings: pinctrl: Add BM1880 pinctrl bindingManivannan Sadhasivam2019-05-031-0/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl binding for Bitmain BM1880 SoC. The SoC is not capable of handling pinconf, thereby supporting only pinmux and this limitation is documented. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | dt-bindings: pinctrl: stm32: add new entry for package informationAlexandre Torgue2019-04-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add "st,package" entry. Possibles values are: -STM32MP_PKG_AA for LFBGA448 (18*18) package -STM32MP_PKG_AB for LFBGA354 (16*16) package -STM32MP_PKG_AC for TFBGA361 (12*12) package -STM32MP_PKG_AD for TFBGA257 (10*10) package Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mt65xx: add OF bindings for MT8516Fabien Parent2019-04-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add binding documentation of pinctrl-mt65xx for MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | dt-bindings: pinctrl: imx7d: Fix PAD_CTL_DSE_X*Christina Quast2019-04-081-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the iMX7d datasheet, the PAD_CTL_DSE_X* values are different from the documentation. Changes since v2: * Changed patch title to 'dt-bindings: pinctrl: imx7d:' Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mt8183: add DT binding documentZhiyong Tao2019-04-081-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | The commit adds mt8183 compatible node in binding document. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: lochnagar: Add initial binding documentationCharles Keepax2019-04-041-0/+141
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Lochnagar is an evaluation and development board for Cirrus Logic Smart CODEC and Amp devices. It allows the connection of most Cirrus Logic devices on mini-cards, as well as allowing connection of various application processor systems to provide a full evaluation platform. This driver supports the board controller chip on the Lochnagar board. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* / dt-bindings: pinctrl: fix bias-pull,up typoChristian Lamparter2019-05-025-5/+5
|/ | | | | | | | This patch fixes a shared typo in several qcom pinctrl dt-bindings. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
* dt-bindings: pinctrl: Document the i.MX50 IOMUXC bindingJonathan Neuschäfer2019-02-211-0/+32
| | | | | | | | | | | | AFAICS from the i.MX50 Reference Manual, the i.MX50 IOMUXC works the same as the one in i.MX51, so I copied fsl,imx51-pinctrl.txt and changed the text to imx50. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Cc: Dong Aisheng <dong.aisheng@linaro.org> Cc: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: add documentation for slew rateClaudiu Beznea2019-02-081-0/+1
| | | | | | | | Add documentation for slew rate. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: add bindings for SAM9X60Claudiu Beznea2019-02-081-2/+3
| | | | | | | | Add device tree binding for SAM9X60 pin controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: add documentation for banksClaudiu Beznea2019-02-081-0/+23
| | | | | | | | Add documentation for at91 pin controller banks. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'ib-qcom-spmi' of /home/linus/linux-gpio into develLinus Walleij2019-01-281-0/+1
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| * dt-bindings: pinctrl: qcom-pmic-gpio: add qcom,pmi8998-gpio bindingBrian Masney2019-01-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add support for the PMI8998 GPIO variant to the Qualcomm PMIC GPIO binding document. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | dt-bindings: imx: Add pinctrl binding doc for imx8mmBai Ping2019-01-281-0/+36
| | | | | | | | | | | | | | | | Add binding doc imx8mm pinctrl driver. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Aisheng Dong <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'ib-meson-fixes' into develLinus Walleij2019-01-221-5/+5
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| * | dt-bindings: pinctrl: meson: update register descriptionsJerome Brunet2019-01-211-5/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | like pull-enable, pull should be optional has this region is available on every controllers. Also, the g12a feature a new region "ds" for the drive-strength All this region thing is one big mess. I suspect that there is only one big GPIO region with holes in it. All registers between the current regions reads '0' so it is probably just spare space to handle more pins. Since we need to continue to handle the existing controllers, switching to one single region now would not simplify things. However, if more organisation layouts and features keep on being added, we may have to look at this again Fixes: 3cd3c83f6752 ("pinctrl: Add compatibles for Amlogic Meson G12A pin controllers") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: dt-bindings: Fix the armada-37xx documentationGregory CLEMENT2019-01-111-1/+5
| | | | | | | | | | | | | | | | | | While it was possible to configure the PCIe1 Wakeup pin, it was missing in the bidding, let's document it. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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