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* ARC: [SMP] TLB flushVineet Gupta2013-11-061-0/+73
* ARC: [SMP] ASID allocationVineet Gupta2013-11-061-6/+8
* ARC: Fix bogus gcc warning and micro-optimise TLB iteration loopVineet Gupta2013-11-061-2/+2
* ARC: [ASID] Track ASID allocation cycles/generationsVineet Gupta2013-08-301-15/+7Star
* ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASIDVineet Gupta2013-08-301-6/+7
* ARC: [ASID] Refactor the TLB paranoid debug codeVineet Gupta2013-08-301-11/+13
* ARC: No need to flush the TLB in early bootVineet Gupta2013-08-301-7/+0Star
* ARC: MMUv4 preps/3 - Abstract out TLB Insert/DeleteVineet Gupta2013-08-301-40/+54
* ARC: MMUv4 preps/2 - Reshuffle PTE bitsVineet Gupta2013-08-301-8/+3Star
* ARC: MMUv4 preps/1 - Fold PTE K/U access flagsVineet Gupta2013-08-291-2/+17
* arc: delete __cpuinit usage from all arc filesPaul Gortmaker2013-06-271-2/+2
* ARC: [mm] Assume pagecache page dirty by defaultVineet Gupta2013-06-221-1/+1
* ARC: [mm] Zero page optimizationVineet Gupta2013-06-221-1/+5
* ARC: Disintegrate arcregs.hVineet Gupta2013-06-221-4/+20
* ARC: Use kconfig helper IS_ENABLED() to get rid of defines.hVineet Gupta2013-06-221-1/+1
* ARC: Brown paper bag bug in macro for checking cache colorVineet Gupta2013-05-231-1/+2
* ARC: [mm] Aliasing VIPT dcache support 2/4Vineet Gupta2013-05-091-6/+21
* ARC: [mm] Aliasing VIPT dcache support 1/4Vineet Gupta2013-05-091-1/+1
* ARC: [mm] Lazy D-cache flush (non aliasing VIPT)Vineet Gupta2013-05-071-5/+13
* ARC: [mm] optimise icache flush for user mappingsVineet Gupta2013-05-071-3/+9
* ARC: Respect the cpu_id passed for fetching correct cpu infoNoam Camus2013-05-071-1/+1
* ARC: [build] Fix warnings with CONFIG_DEBUG_SECTION_MISMATCHVineet Gupta2013-04-091-2/+2
* ARC: Boot #2: Verbose Boot reporting / feature verificationVineet Gupta2013-02-151-0/+38
* ARC: SMP supportVineet Gupta2013-02-151-0/+6
* ARC: TLB flush HandlingVineet Gupta2013-02-151-0/+311
* ARC: MMU Exception HandlingVineet Gupta2013-02-151-0/+267
* ARC: MMU Context ManagementVineet Gupta2013-02-151-0/+23
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