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* ARM: dt: tegra: rename board files to match SoCStephen Warren2012-06-201-444/+0Star
| | | | | | | | | | | | | | Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: remove legacy support-8bit propertyStephen Warren2012-06-111-1/+0Star
| | | | | | | The driver supports the new bus-width property, so remove the legacy support-8bit property. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra20: Rename "emc" to "memory-controller"hdoyu@nvidia.com2012-06-111-1/+1
| | | | | | | | Use a more plain english name. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> [swarren: also rename the node in tegra-seaboard.dts] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge branch 'drivers/mmc' into next/dt2Arnd Bergmann2012-05-151-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Changes in the dt2 branch move stuff around that gets changed in the drivers/mmc branch. I chose a non-obvious resolution by adding the new bus-width property into all the tegra sdhci device nodes. Conflicts: arch/arm/boot/dts/tegra-cardhu.dts arch/arm/boot/dts/tegra-harmony.dts arch/arm/boot/dts/tegra-ventana.dts Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * mmc: dt: Consolidate DT bindingsArnd Bergmann2012-05-151-0/+2
| | | | | | | | | | | | | | | | | | | | This patch unifies the current DT MMC bindings documentation and code, adds generic MMC DT bindings documentation, and updates .dts files for consistency. [cjb: typo fixes, addition of max-frequency property] Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | ARM: dt: tegra: invert status=disable vs status=okayStephen Warren2012-05-141-24/+13Star
| | | | | | | | | | | | | | | | | | | | | | | | | | In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* | ARM: dt: tegra: sort nodes based on bus orderStephen Warren2012-05-141-82/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* | ARM: dt: tegra: remove duplicate device_type propertyStephen Warren2012-05-141-1/+0Star
| | | | | | | | | | | | | | It's already specified in skeleton.dtsi, included via tegra20.dtsi. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* | ARM: dt: tegra: remove unnecessary unit addressesStephen Warren2012-05-141-2/+2
| | | | | | | | | | | | | | | | DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* | ARM: dt: tegra: whitespace cleanupStephen Warren2012-05-141-13/+13
| | | | | | | | | | | | | | Consistently don't place a space after < or before >. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* | Merge branch 'for-3.5/dt' into for-3.5/dt2-newStephen Warren2012-05-141-4/+37
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| * | ARM: dt: tegra seaboard: add i2c devicesOlof Johansson2012-05-031-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the known i2c devices on seaboard to the i2c table. Also rename the temperature sensor device node, and mark it as a nct1008 instead of an adt7461 (which it is -- the chips are compatible though). Signed-off-by: Olof Johansson <olof@lixom.net> [swarren: Removed isl29018 from patch; it's already there now. Fixed interrupts properties now that Tegra GPIO is an interrupt controller. Moved smart-battery to the correct I2C bus.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | ARM: dt: tegra seaboard: configure I2C2 pinmuxStephen Warren2012-05-031-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard actually uses this as an I2C bus mux, and devices are connected to both pingroups. This change statically assigns the I2C2 controller to pingroup PTA, so that on-board devices can be accessed. The DDC pingroup is used for EDID/DDC accesses which are not yet required, given the absence of any Tegra graphics support. I2C muxing will be supported later. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | ARM: dt: tegra seaboard: fix I2C2 SCL rateStephen Warren2012-05-031-1/+1
| | | | | | | | | | | | | | | | | | | | | This I2C bus is used for EDID/DDC reads and other "slow" I2C devices. This requires a 100KHz SCL (clock) rate. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | ARM: dt: tegra: enable als and proximity sensorLaxman Dewangan2012-05-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the device info for ALS and proximity sensor for tegra boards cardhu, ventana and seaboard. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | ARM: tegra: add USB ULPI PHY reset GPIO to device treeStephen Warren2012-04-251-0/+4
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | ULPI PHYs have a reset signal, and different boards use a different GPIO for this task. Add a property to device tree to represent this. I'm not sure if adding this property to the EHCI controller node is entirely correct; perhaps eventually we should have explicit separate nodes for the various PHYs. However, we don't have that right now, so this binding seems like a reasonable choice. Cc: <devicetree-discuss@lists.ozlabs.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: <linux-usb@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* / ARM: dt: tegra20: add pinmux to device treeStephen Warren2012-04-181-0/+243
|/ | | | | | | | | | This adds a complete pinmux configuration to all Tegra20 device tree files. This allows removal of board-dt-tegra20.c's use of the pinmux board files, and the special device tree handling in board-pinmux.c. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
* arm: tegra: dts: Mark USB1 as an OTG port on SeaboardSimon Glass2012-03-071-0/+1
| | | | | | | | | The USB1 port on Tegra2 supports operation in host or device modes. On Seaboard this is possible, so mark the port as OTG. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: Enable audio on WM8903 boards, disable othersStephen Warren2012-02-071-0/+40
| | | | | | | | | | | | | | | Add complete bindings to instantiate and configure the codec and top-level audio complex on all currently supported boards using the Tegra+WM8903 audio driver. On those boards, disable the I2S2 controller since it isn't used. On boards not using the WM8903 codec, disable all the audio devices; they can be re-enabled once the relevant codec and ASoC machine drivers have been ported to device-tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: seaboard: add EMC table to device treeOlof Johansson2012-02-071-0/+38
| | | | | | | Timings for the T25 version of seaboard, only one memory manufacturer and timing table (two speeds). Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/tegra: Seaboard: Add GPIO key device tree nodesStephen Warren2011-12-201-0/+20
| | | | | | | | This brings all the GPIO key definitions from board-seaboard.c into tegra-seaboard.dtsi. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: Add ADT7461 to SeaboardStephen Warren2011-12-201-0/+5
| | | | | | | | The ADT7461 is a temperature monitoring IC. One is present on the DVC I2C bus on Seaboard. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: tegra: Fix SDHCI nodes to match board filesStephen Warren2011-12-081-0/+8
| | | | | | | | | | | | | | | | | | | Mark any SDHCI controllers that aren't registered by the board files as disabled in the device-tree files. In practice, these controllers: * Have nothing hooked up to them at all, or * For ports intended for SDIO usage, the drivers for anything that might be attached are not in the device-tree yet. If/when drivers appear, the SD/MMC port can be re-enabled. The only possible exception is TrimSlice's mico SD slot, but that wasn't enabled in the board files before anyway, and doesn't work when all the SDHCI controllers are enabled anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: tegra: Fix serial nodes to match board filesStephen Warren2011-12-081-0/+16
| | | | | | | | | | | | | | Mark any serial ports that aren't registered by the board files as disabled in the device-tree files. In practice, none of the now-disabled ports ended up succeeding device probing because of the missing clock-frequency property. However, explicitly marking the devices disabled has the advantage of squashing the dev_warn() the failed probe causes, and documenting that we intend the port not to be used, rather than accidentally left out the property. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: tegra: Fix I2C nodes to match board filesStephen Warren2011-12-081-0/+16
| | | | | | | | | | | | With board files, all I2C busses run at 400KHz. Fix the device-tree to be consistent with this. It's possible this is incorrect, but at least it keeps the board files and device-tree consistent. Also, disable any I2C controllers that the board files don't register, also for consistency. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: tegra: Remove /chosen nodeStephen Warren2011-12-081-4/+0Star
| | | | | | | | | | | | | | | The command-lines present in the existing /chosen node are not necessarily correct for all users. Ideally, we should simply use the command-line supplied by the boot-loader. In fact, using the boot-loader's cmdline is quite easy; either the bootloader fully supports DT, in which case it can modify the DT passed to the kernel to include its command-line, or CONFIG_APPENDED_DTB can be used in conjunction with CONFIG_ARM_ATAG_DTB_COMPAT, and the kernel will substitute the bootloader's command-line into the DT. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: tegra: Remove /memreserve/ from device-tree filesStephen Warren2011-12-081-1/+0Star
| | | | | | | | | | | There are no drivers in the kernel at present which can make use of the memory reserved by /memreserve/, so there is no point reserving it. Remove /memreserve/ to allow the user more memory. It's also unclear whether any future driver would actually require /memreserve/, or allocate memory through some other mechanism. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/dt: add basic usb nodes to tegra device treesOlof Johansson2011-12-081-0/+4
| | | | | | | | | | | For now they are a minimal binding. It needs to be amended with vendor-specific settings for phy setup and link tuning, etc. v2: Added bindings specification and phy_type properties Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Stephen Warren <swarren@nvidia.com>
* arm/dt: Tegra: Add support-8bit to SDHCI nodesStephen Warren2011-09-221-0/+4
| | | | | | | | | For Seaboard's internal eMMC, this makes the difference between a 5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any measurable difference on my cheap/slow ~2MB/s card. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* arm/dt: Tegra: Update SDHCI nodes to match bindingsStephen Warren2011-09-201-3/+3
| | | | | | | | | The bindings were recently updated to have separate properties for each type of GPIO. Update the Device Tree source to match that. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* arm/dt: tegra devicetree supportGrant Likely2011-07-281-0/+28
Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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