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* ARM: davinci: remove intc related fields from davinci_soc_infoBartosz Golaszewski2019-02-191-3/+0Star
| | | | | | | | | The fields related to the two davinci interrupt controllers are no longer used. Remove them. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: cp-intc: use the new-style config structureBartosz Golaszewski2019-02-191-1/+0Star
| | | | | | | | | | | | | | | | | | Modify the cp-intc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_cp_intc_init() to irq-davinci-cp-intc.h and make it take the new config structure as parameter. Convert all users to the new version. Also: since the two da8xx SoCs default all irq priorities to 7, just drop the priority configuration at all and hardcode the channels to 7. It will simplify the driver code and make our lives easier when it comes to device-tree support. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: cp-intc: use a common prefix for all symbolsBartosz Golaszewski2019-02-191-1/+1
| | | | | | | | | In preparation for moving the driver to drivers/irqchip do some cleanup: use a common prefix for all symbols. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: cp-intc: remove cp_intc.hBartosz Golaszewski2019-02-191-0/+1
| | | | | | | | | | | There's no need to have a local header for cp-intc. Move the only declaration for a public function to common.h. Move all register offsets into the driver source file and drop all unused defines. Make cp_intc_of_init() static. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: aintc: use the new config structureBartosz Golaszewski2019-02-191-2/+0Star
| | | | | | | | | | | | Modify the aintc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h and make it take the new config structure as parameter. Convert all users to the new version. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: aintc: use a common prefix for symbols in the driverBartosz Golaszewski2019-02-191-1/+1
| | | | | | | | | In preparation for moving the driver to drivers/irqchip do some cleanup: use a common prefix for all symbols. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: select SPARSE_IRQBartosz Golaszewski2019-02-191-1/+3
| | | | | | | | | | | | Everything is in place now for SPARSE_IRQ. Select it and set DAVINCI_INTC_START to NR_IRQS. We now need to include mach/irqs.h in a couple places as it is no longer indirectly included after selecting SPARSE_IRQ. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: wrap HW interrupt numbers with a macroBartosz Golaszewski2019-02-191-0/+3
| | | | | | | | | | | | Once we select SPARSE_IRQ, the interrupt numbers defined in mach/irqs.h will only signify the hardware interrupt offsets, not the interrupt numbers seen by linux. Introduce a wrapper macro that translates the hwirq number to virtual numbers. For now it's just a dummy. Use that macro when specifying the interrupts in resources for platform devices. Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: pull davinci_intc_base into the respective intc driversBartosz Golaszewski2019-02-191-1/+0Star
| | | | | | | | | | davinci_intc_base is defined globally in common.c. Define separate local variables for the aintc and cp-intc drivers and remove the global one. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: remove davinci_intc_typeBartosz Golaszewski2019-02-191-2/+0Star
| | | | | | | | | | We now use the generic ARM irq handler on davinci. There are no more users that check davinci_intc_type. Remove the variable and all its references. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: remove intc_host_map from davinci_soc_info structBartosz Golaszewski2019-02-191-1/+0Star
| | | | | | | | | The intc_host_map field in struct davinci_soc_info is not used by any board. Remove it as part of the interrupt support cleanup. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: remove legacy clocksDavid Lechner2018-06-261-2/+0Star
| | | | | | | | This removes the unused legacy clock code from arch/arm/mach-davinci/. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKSDavid Lechner2018-06-261-6/+0Star
| | | | | | | | | | The common clock framework will take care of disabling unused clocks when we switch from the legacy davinci clocks and having this enabled will cause compile errors after we switch, so remove it now. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: pass clock as parameter to davinci_timer_init()David Lechner2018-06-261-1/+2
| | | | | | | | | | | | | | | | | This changes davinci_timer_init() so that we pass the clock as a parameter instead of using clk_get(). This is done in preparation for converting to the common clock framework. It removes the requirement that we have to have a clock with con_id of "timer0", which will be good for DT bindings since clock-names = "timer0" doesn't really make sense. Also, drop use of extern in header file since we are touching the definition. Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: move davinci_clk_init() to init_timeDavid Lechner2018-02-191-1/+0Star
| | | | | | | | | | | | | | | | | | | | This moves the call of davinci_clk_init() from map_io to init_time for all boards. This is the proper place to init clocks. This is also done in preparation for moving to the common clock framework. dm646x is a special case because we need to handle different ref_clk rates depending on which board is being used. The clock init in this case is modified to set the rate before registering the clocks instead of using davinci_set_refclk_rate() to recalculate the entire clock tree after all of the clocks are registered. Also, the cpu_clks field is removed from struct davinci_soc_info since it is no longer needed. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: remove watchdog resetDavid Lechner2018-02-191-1/+0Star
| | | | | | | | | | This removes the watchdog reset code. The reset has been moved to drivers/watchdog/davinci_wdt.c. The watchdog driver registers the reset with the kernel so defining a reset for each machine is no longer needed. Signed-off-by: David Lechner <david@lechnology.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: make argument to davinci_common_init() as constBhumika Goyal2017-12-231-1/+1
| | | | | | | | | | | | Make the function argument of the function davinci_common_init as const as it's memory contents are only copied during a memcpy call. So, the fields of the structure to which the argument soc_info points to never gets modified and therefore the argument can be made const. Add const to the prototype too. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: add skeleton for pdata-quirksKevin Hilman2017-01-231-0/+2
| | | | | | | | | Add skeleton pdata-quirks for davinci. Signed-off-by: Kevin Hilman <khilman@baylibre.com> [nsekhar@ti.com: move changes to build pdata-quirks.c and call to pdata_quirks_init() to this patch] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: serial: remove davinci_serial_setup_clk()Manjunathappa, Prakash2013-08-211-1/+0Star
| | | | | | | | | | | | | Get rid of davinci_serial_setup_clk() since its not called from multiple places now. Instead initialize clock in davinci_serial_init() itself. This also helps get rid of "serial_dev" member of struct davinci_soc_info. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Suggested-by: Sekhar Nori <nsekhar@ti.com> [nsekhar@ti.com: split removal of davinci_serial_setup_clk() into a separate patch.] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* reboot: arm: change reboot_mode to use enum reboot_modeRobin Holt2013-07-091-1/+2
| | | | | | | | | | | | | | | | Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ARM: delete struct sys_timerStephen Warren2012-12-241-3/+1Star
| | | | | | | | | | | | | | | | | | Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: davinci: sram: switch from iotable to ioremapped regionsBen Gardiner2012-10-271-2/+0Star
| | | | | | | | | | | | | | | | | The current davinci init sets up SRAM in iotables. There has been an observed failure to boot a da850 with 128K specified in the iotable. Make the davinci sram allocator do an ioremap of the region specified by the entries in davinci_soc_info before registering with gen_pool_add_virt(). Remove all iotable SRAM mappings and SRAM_VIRT. Regression tested suspend/resume on AM180x EVM. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ARM: davinci: use machine specific hook for late initShawn Guo2012-05-051-0/+19
| | | | | | Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sekhar Nori <nsekhar@ti.com>
* ARM: 7190/1: restart: davinci: use new restart hookSekhar Nori2012-01-051-2/+1Star
| | | | | | | | | | | | | | | Rather than using DaVinci specific davinci_soc_info based restart hook, use the restart hook available in the machine descriptor instead. Tested on DM365 and AM18x EVMs. v2: Changed to use restart hook in machine descriptor per Russell's comment. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Davinci: iotable based ioremap() interceptionCyril Chemparathy2010-05-131-1/+7
| | | | | | | | | | | | | | This patch allows for a more flexible ioremap() interception based on iotable contents. With this patch, the ioremap() interception code can properly translate addresses only after davinci_soc_info has been initialized. Consequently, in soc-specific init functions, davinci_common_init() has to happen before any ioremap() attempts. The da8xx init sequence has been suitably modified to meet this restriction. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: pinmux - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: aintc/cpintc - use ioremap()Cyril Chemparathy2010-05-131-1/+2
| | | | | | | | | | | | | | | | | | This patch implements the following: - interrupt initialization uses ioremap() instead of passing a virtual address via davinci_soc_info. - machine definitions directly point to cp_intc_init() or davinci_irq_init() - davinci_intc_type and davinci_intc_base now get initialized in controller specific init functions instead of davinci_common_init() - minor fix in davinci_irq_init() to use intc_irq_num instead of DAVINCI_N_AINTC_IRQ Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: psc - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: timer - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The timer code has correspondingly been modified to ioremap() MMRs instead. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: jtag_id - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | | | | This patch replaces the jtag id base info in davinci_soc_info with a physical address which is then ioremap()ed within common code. This patch (in combination with a similar change for PSC) will allow us to eliminate the SYSCFG nastiness in DA8xx code. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: gpio - use ioremap()Cyril Chemparathy2010-05-131-1/+1
| | | | | | | | | This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: watchdog reset separation across socsCyril Chemparathy2010-05-071-0/+2
| | | | | | | | | | | | | | | | | The earlier watchdog reset mechanism had a couple of limitations. First, it embedded a reference to "davinci_wdt_device" inside common code. This forced all derived platforms (da8xx and tnetv107x) to define such a device. This also would have caused problems in including multiple socs in a single build due to symbol redefinition. With this patch, davinci_watchdog_reset() now takes the platform device as an argument. The davinci_soc_info struct has been extended to include a reset function and a watchdog platform_device. arch_reset() then uses these elements to reset the system in a SoC specific fashion. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: gpio - controller type supportCyril Chemparathy2010-05-071-0/+1
| | | | | | | | | | | | | This patch allows for gpio controllers that deviate from those found on traditional davinci socs. davinci_soc_info has an added field to indicate the soc-specific gpio controller type. The gpio initialization code then bails out if necessary. More elements (tnetv107x) to be added later into enum davinci_gpio_type. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Davinci: gpio - register layout invariant inlinesCyril Chemparathy2010-05-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | This patch renders the inlined gpio accessors in gpio.h independent of the underlying controller's register layout. This is done by including three new fields in davinci_gpio_controller to hold the addresses of the set, clear, and in data registers. Other changes: 1. davinci_gpio_regs structure definition moved to gpio.c. This structure is no longer common across all davinci socs (davinci_gpio_controller is). 2. controller base address calculation code (gpio2controller()) moved to gpio.c as this was no longer necessary for the inline implementation. 3. modified inline range checks to use davinci_soc_info.gpio_num instead of DAVINCI_N_GPIO. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DaVinci: move IDE platform device to its proper placeSergei Shtylyov2010-05-071-0/+1
| | | | | | | | | | | The IDE platform device is registered in three different places (2 board files for DM644x and in dm646x.c for DM646x) while both the IDE base address and the IDE IRQ are the same for both SoCs -- therefore, the proper place for the IDE platform seems to be in devices.c. Merge the IDE platform data and registration code and create davinci_init_ide() in place of dm646x_init_ide()... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: mach/common.h: add missing includesThomas Koeller2010-05-071-0/+3
| | | | | | | | linux/compiler.h is required for __iomem linux/types.h is required u32 Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: clkdev cleanup: remove clk_lookup wrapper, use clkdev_add_table()Kevin Hilman2010-02-041-1/+1
| | | | | | | Remove unneeded 'struct davinci_clk' wrapper around 'struct clk_lookup' and use clkdev_add_table() to add the list of clocks in one go. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* DaVinci: rename setup_usb() to davinci_setup_usb()Sergei Shtylyov2009-11-251-6/+0Star
| | | | | | | | | | | | Rename setup_usb() into davinci_setup_usb(). While at it: - move its declaration from <mach/common.h> to more fitting <mach/usb.h>; - teach it to handle values of the 'mA' parameter greater than 510 and thus pass 1000 instead of 500 for the power switches capable of sourcing over 1 A; - teach it to handle odd values of the 'potpgt_ms' parameter... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: dm365 gpio irq supportDavid Brownell2009-08-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs: - Flag DM365 chips as using non-banked GPIO interrupts, using a new soc_info field. - Replace the gpio_to_irq() mapping logic. This now uses some runtime infrastructure, keyed off that new soc_info field, which doesn't handle irq_to_gpio(). - Provide a new irq_chip ... GPIO IRQs handled directly by AINTC still need edge triggering managed by the GPIO controller. DM365 chips no longer falsely report 104 GPIO IRQs as they boot. Intelligence about IRQ muxing is missing, so for the moment this only exposes the first eight DM365 GPIOs, which are never muxed. The next eight are muxed, half with Ethernet (which uses most of those pins anyway). Tested on DM355 (10 unbanked IRQs _or_ 104 banked ones) and also on DM365 (16 unbanked ones, only 8 made available). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: remove watchdog from soc_infoKevin Hilman2009-08-261-1/+0Star
| | | | | | | watchdog info is not needed in soc_info, platform_device can be used directly in core code. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: soc-specific SRAM setupDavid Brownell2009-05-291-0/+6
| | | | | | | | | | | | | | | | | Package on-chip SRAM. It's always accessible from the ARM, so set up a standardized virtual address mapping into a 128 KiB area that's reserved for platform use. In some cases (dm6467) the physical addresses used for EDMA are not the same as the ones used by the ARM ... so record that info separately in the SOC data, for chips (unlike the OMAP-L137) where SRAM may be used with EDMA. Other blocks of SRAM, such as the ETB buffer or DSP L1/L2 RAM, may be unused/available on some system. They are ignored here. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add compare register support to timer codeMark A. Greer2009-05-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Timer64p timer has 8 compare registers that can be used to generate interrupts when the timer value matches the compare reg's value. They do not disturb the timer itself. This can be useful when there is only one timer available for both clock events and clocksource. When enabled, the clocksource remains a continuous 32-bit counter but the clock event will no longer support periodic interrupts. Instead only oneshot timers will be supported and implemented by setting the compare register to the current timer value plus the period that the clock event subsystem is requesting. Compare registers support is enabled automatically when the following conditions are met: 1) The same timer is being used for clock events and clocksource. 2) The timer is the bottom half (32 bits) of the 64-bit timer (hardware limitation). 3) The the compare register offset and irq are not zero. Since the timer is always running, there is a hardware race in timer32_config() between reading the current timer value, and adding the period to the current timer value and writing the compare register. Testing on a da830 evm board with the timer clocked at 24 MHz and the processor clocked at 300 MHz, showed the number of counter ticks to do this ranged from 20-53 (~1-2.2 usecs) but usually around 41 ticks. This includes some artifacts from collecting the information. So, the minimum period should be at least 5 usecs to be safe. There is also an non-critical lower limit that the period should be since there is no point in setting an event that is much shorter than the time it takes to set the event, and get & handle the timer interrupt for that event. There can also be all sorts of delays from activities occuring elsewhere in the system (including hardware activitis like cache & TLB management). These are virtually impossible to quantify so a minimum period of 50 usecs was chosen. That will certianly be enough to avoid the actual hardware race but hopefully not large enough to cause unreasonably course-grained timers. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Integrate cp_intc support into low-level irq codeMark A. Greer2009-05-291-0/+1
| | | | | | | | | | Integrate the Common Platform Interrupt Controller (cp_intc) support into the low-level irq handling for davinci and similar platforms. Do it such that support for cp_intc and the original aintc can coexist in the same kernel binary. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Move emac platform_data to SoC-specific filesMark A. Greer2009-05-291-0/+1
| | | | | | | | | | | Since most of the emac platform_data is really SoC specific and not board specific, move it to the SoC-specific files. Put a pointer to the platform_data in the soc_info structure so the board-specific code can set some of the platform_data if it needs to. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Move serial platform_device into SoC-specific filesMark A. Greer2009-05-291-0/+1
| | | | | | | | | | | | | | | | | | | Currently, there is one set of platform_device and platform_data structures for all DaVinci SoCs. The differences in the data between the various SoCs is handled by davinci_serial_init() by checking the SoC type. However, as new SoCs appear, this routine will become more & more cluttered. To clean up the routine and make it easier to add support for new SoCs, move the platform_device and platform_data structures into the SoC-specific code and use the SoC infrastructure to provide access to the data. In the process, fix a bug where the wrong irq is used for uart2 of the dm646x. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Make GPIO code more genericMark A. Greer2009-05-291-0/+3
| | | | | | | | | | | | | | | | | | The current gpio code needs to know the number of gpio irqs there are and what the bank irq number is. To determine those values, it checks the SoC type. It also assumes that the base address and the number of irqs the interrupt controller uses is fixed. To clean up the SoC checks and make it support different base addresses and interrupt controllers, have the SoC-specific code set those values in the soc_info structure and have the gpio code reference them there. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add watchdog base address flexibilityMark A. Greer2009-05-261-0/+1
| | | | | | | | | | The watchdog code currently hardcodes the base address of the timer its using. To support new SoCs, make it support timers at any address. Use the soc_info structure to do this. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add base address and timer flexibilityMark A. Greer2009-05-261-0/+13
| | | | | | | | | | | The davinci timer code currently hardcodes the timer register base addresses, the timer irq numbers, and the timers to use for clock events and clocksource. This won't work for some a new SoC so put those values into the soc_info structure and set them up in the SoC-specific files. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Move interrupt ctlr info to SoC infrastructureMark A. Greer2009-05-261-0/+5
| | | | | | | | | | | | | | | | | | Use the SoC infrastructure to hold the interrupt controller information (i.e., base address, default priorities, interrupt controller type, and the number of IRQs). The interrupt controller base, although initially put in the soc_info structure's intc_base field, is eventually put in the global 'davinci_intc_base' so the low-level interrupt code can access it without a dereference. These changes enable the SoC default irq priorities to be put in the SoC-specific files, and the interrupt controller to be at any base address. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Move pinmux setup info to SoC infrastructureMark A. Greer2009-05-261-0/+3
| | | | | | | | | The pinmux register base and setup can be different for different SoCs so move the pinmux reg base, pinmux table (and its size) to the SoC infrastructure. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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