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* davinci: remove watchdog from soc_infoKevin Hilman2009-08-261-3/+3
| | | | | | | watchdog info is not needed in soc_info, platform_device can be used directly in core code. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Fix watchdog reset codeDavid Griego2009-08-261-7/+3Star
| | | | | | | | | | | | | The davinci reset routine, davinci_watchdog_reset(), sets the TCR register instead of the TGCR register as it should to put the WDT into its "Initial State". It also writes the WDTCR register without the proper WDKEY which is pointless since the register will be write-protected. Signed-off-by: David Griego <dgriego@mvista.com> Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Move PINMUX defines to SoC filesMark A. Greer2009-05-291-1/+1
| | | | | | | | | | Different SoC have different numbers of pinmux registers and other resources that overlap with each other. To clean up the code and eliminate defines that overlap with each other, move the PINMUX defines to the SoC specific files. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add compare register support to timer codeMark A. Greer2009-05-291-38/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Timer64p timer has 8 compare registers that can be used to generate interrupts when the timer value matches the compare reg's value. They do not disturb the timer itself. This can be useful when there is only one timer available for both clock events and clocksource. When enabled, the clocksource remains a continuous 32-bit counter but the clock event will no longer support periodic interrupts. Instead only oneshot timers will be supported and implemented by setting the compare register to the current timer value plus the period that the clock event subsystem is requesting. Compare registers support is enabled automatically when the following conditions are met: 1) The same timer is being used for clock events and clocksource. 2) The timer is the bottom half (32 bits) of the 64-bit timer (hardware limitation). 3) The the compare register offset and irq are not zero. Since the timer is always running, there is a hardware race in timer32_config() between reading the current timer value, and adding the period to the current timer value and writing the compare register. Testing on a da830 evm board with the timer clocked at 24 MHz and the processor clocked at 300 MHz, showed the number of counter ticks to do this ranged from 20-53 (~1-2.2 usecs) but usually around 41 ticks. This includes some artifacts from collecting the information. So, the minimum period should be at least 5 usecs to be safe. There is also an non-critical lower limit that the period should be since there is no point in setting an event that is much shorter than the time it takes to set the event, and get & handle the timer interrupt for that event. There can also be all sorts of delays from activities occuring elsewhere in the system (including hardware activitis like cache & TLB management). These are virtually impossible to quantify so a minimum period of 50 usecs was chosen. That will certianly be enough to avoid the actual hardware race but hopefully not large enough to cause unreasonably course-grained timers. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add watchdog base address flexibilityMark A. Greer2009-05-261-3/+2Star
| | | | | | | | | | The watchdog code currently hardcodes the base address of the timer its using. To support new SoCs, make it support timers at any address. Use the soc_info structure to do this. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: Add base address and timer flexibilityMark A. Greer2009-05-261-55/+45Star
| | | | | | | | | | | The davinci timer code currently hardcodes the timer register base addresses, the timer irq numbers, and the timers to use for clock events and clocksource. This won't work for some a new SoC so put those values into the soc_info structure and set them up in the SoC-specific files. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: add platform support for watchdog timerKevin Hilman2009-05-261-5/+4Star
| | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: timers: use clk_get_rate()Kevin Hilman2009-04-271-3/+21
| | | | | | | Use clock framework instead of hard-coded CLOCK_TICK_RATE for determining timer tick frequencies. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* davinci: add arch_ioremap() which uses existing static mappingsKevin Hilman2009-04-231-35/+44
| | | | | | | | | | | Add arch-specific ioremap() which uses any existing static mappings in place of doing a new mapping. From now on, drivers should always use ioremap() instead of IO_ADDRESS(). In addition, remove the davinci_[read|write]* macros in favor of using ioremap. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* clocksource: pass clocksource to read() callbackMagnus Damm2009-04-211-1/+1
| | | | | | | | | | | | | | Pass clocksource pointer to the read() callback for clocksources. This allows us to share the callback between multiple instances. [hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods] [akpm@linux-foundation.org: cleanup] Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* cpumask: convert struct clock_event_device to cpumask pointers.Rusty Russell2008-12-131-1/+1
| | | | | | | | | | | | | Impact: change calling convention of existing clock_event APIs struct clock_event_timer's cpumask field gets changed to take pointer, as does the ->broadcast function. Another single-patch change. For safety, we BUG_ON() in clockevents_register_device() if it's not set. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Ingo Molnar <mingo@elte.hu>
* [ARM] Convert asm/io.h to linux/io.hRussell King2008-09-061-1/+1
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-071-2/+2
| | | | | | This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Remove asm/hardware.h, use asm/arch/hardware.h insteadRussell King2008-08-071-1/+1
| | | | | | | | | Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* clockevents: fix resume logicThomas Gleixner2007-07-221-0/+2
| | | | | | | | | | | | | | | | | | | | We need to make sure, that the clockevent devices are resumed, before the tick is resumed. The current resume logic does not guarantee this. Add CLOCK_EVT_MODE_RESUME and call the set mode functions of the clock event devices before resuming the tick / oneshot functionality. Fixup the existing users. Thanks to Nigel Cunningham for tracking down a long standing thinko, which affected the jinxed VAIO. [akpm@linux-foundation.org: xen build fix] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: john stultz <johnstul@us.ibm.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [ARM] 4303/3: base kernel support for TI DaVinciKevin Hilman2007-05-111-0/+372
Add base kernel support for the TI DaVinci platform. This patch only includes interrupts, timers, CPU identification, serial support and basic power and sleep controller init. More drivers to come. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>