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* arm64: dts: meson: fix mmc pin biasJerome Brunet2019-05-211-10/+25
| | | | | | | | Clk pin does not require bias, data strobe should be pulled low. The rest of the pin (data and cmd) are pulled up. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson-gx: add support for simplefbMaxime Jourdan2019-01-171-0/+6
| | | | | | | | | | | SimpleFB allows transferring a framebuffer from the firmware/bootloader to the kernel, while making sure the related clocks and power supplies stay enabled. Add nodes for CVBS and HDMI Simple Framebuffers. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson: add clock controller clock inputsJerome Brunet2018-12-051-0/+4
| | | | | | | Add the clock inputs of the clock controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson: consistently disable pin biasJerome Brunet2018-11-291-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | On Amlogic chipsets, the bias set through pinconf applies to the pad itself, not only the GPIO function. This means that even when we change the function of the pad from GPIO to anything else, the bias previously set still applies. As we have seen with the eMMC, depending on the bias type and the function, it may trigger problems. The underlying issue is that we inherit whatever was left by previous user of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual setup we will get is undefined. There is nothing mentioned in the documentation about pad bias and pinmux function, however leaving it undefined is not an option. This change consistently disable the pad bias for every pinmux functions. It seems to work well, we can only assume that the necessary bias (if any) is already provided by the pin function itself. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson: disable pad bias for mmc pinmuxesJerome Brunet2018-11-291-0/+4
| | | | | | | | | | | In some cases (such as a boot from SPI) the bootloader or the ROM code may leave a bias pull-down on the mmc pins. If so the MMC will fail during the initialisation. Explicitly disabling the pinmux solves the problem. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson: remove extra subnode in mmc clk_gate pinmuxJerome Brunet2018-11-291-9/+0Star
| | | | | | | | | In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for the function definition, the other for the bias. This is not necessary since we can define the function and the bias in the same subnode. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson-gx: add efuse pclkJerome Brunet2018-11-151-0/+4
| | | | | | | Add the required peripheral clock for the efuse device. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson: Fix erroneous SPI bus warningsRob Herring2018-09-141-1/+1
| | | | | | | | | | | | | | dtc has new checks for SPI buses. The meson dts files have a node named spi' which causes false positive warnings. As the node is a pinctrl child node, change the node name to be 'spi-pins' to fix the warnings. arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dtb: Warning (spi_bus_bridge): /soc/periphs@c8834000/pinctrl@4b0/spi: incorrect #address-cells for SPI bus Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: linux-amlogic@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: fix ATF reserved memory regionKevin Hilman2018-06-281-8/+0Star
| | | | | | | | | | | | | Vendor firmware/uboot has different reserved regions depending on firmware version, but current codebase reserves the same regions on GXL and GXBB, so move the additional reserved memory region to common .dtsi. Found when putting a recent vendor u-boot on meson-gxbb-p200. Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Cc: stable@vger.kernel.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson: fix clock source of the pclk for UART_AOYixun Lan2018-05-231-2/+2
| | | | | | | | | | | | | >From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson: add MMC resetsJerome Brunet2018-05-101-1/+4
| | | | | | | Add reset lines to the mmc controllers of the meson gx and axg SoCs Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: fix gxl clock controller compatibleJerome Brunet2018-04-191-1/+1
| | | | | | | | | | | | | | There are a few differences between the gxbb and gxl clock controllers which makes them incompatible. The hdmi, gp0 and fixed pll are different. The rate of these plls reported by gxbb driver on a gxl device would be wrong. Remove the gxbb compatible from the gxl clock controller node so only the correct driver is matched. Fixes: 973fbd55b53c ("ARM64: dts: meson-gxl: Add clock nodes") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: sysctrl is the parent of the clock controllerJerome Brunet2018-04-191-3/+2Star
| | | | | | | | | The parent of the meson-gx clock controller should be the hhi system controller, not the HIU bus. This way, the HHI register region can be used safely by multiple drivers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: add USB host supportMartin Blumenstingl2018-04-181-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds USB host support to the Meson GXL SoC. A dwc3 controller is used for host-mode, while a dwc2 controller (not added in this patch because I could not get it working) is used for device-mode only. The dwc3 controller's internal roothub has two USB2 ports enabled but no USB3 port. Each of the ports is supplied by a separate PHY. The USB pins are connected to the SoC's USBHOST_A and USBOTG_B pins. Due to the way the roothub works internally the USB PHYs are left enabled. When the dwc3 controller is disabled the PHY is never powered on so it does not draw any extra power. However, when the dwc3 host controller is enabled then all PHYs also have to be enabled, otherwise USB devices will not be detected (regardless of whether they are plugged into an enabled port or not). This means that only the dwc3 controller has to be enabled on boards with USB support (instead of requiring all boards to enable the PHYs additionally with the chance of forgetting to enable one and breaking all other ports with that as well). This also adds the USB3 PHY which currently only does some basic initialization. That however is required because without it high-speed devices (like USB thumb drives) do not work on some devices (probably because the bootloader does not configure the USB3 PHY registers). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: amlogic: Convert to new-style SPDX license identifiersNeil Armstrong2018-03-081-38/+1Star
| | | | | | | | Move the SPDX-License-Identifier lines to the top and drop the license splat. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: add internal ethernet PHY irqJerome Brunet2018-02-121-0/+1
| | | | | | | Add the interrupt of the internal ethernet PHY Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* Merge tag 'amlogic-dt64' of ↵Arnd Bergmann2017-12-211-2/+44
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit DT updates for v4.16" from Kevin Hilman - meson-gx: add VPU power domain support - odroid-c2: add HDMI and CEC nodes - misc cleanups * tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gxm: fix q200 interrupt number ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2 ARM64: dts: meson: add comments with the GPIO for the PHY interrupts ARM64: dts: amlogic: use generic bus node names ARM64: dts: meson: drop "sana" clock from SAR ADC ARM64: dts: odroid-c2: Add HDMI and CEC Nodes ARM64: dts: meson-gx: grow reset controller memory zone ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards ARM64: dts: meson-gx: add VPU power domain
| * ARM64: dts: meson: drop "sana" clock from SAR ADCXingyu Chen2017-12-061-2/+1Star
| | | | | | | | | | | | | | | | | | The SAR ADC modules doesn't require The "sana" clock. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Singed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * ARM64: dts: meson-gx: add VPU power domainNeil Armstrong2017-12-061-0/+43
| | | | | | | | | | | | | | | | This patch adds support for the VPU Power Domain nodes, and attaches the VPU power domain to the VPU node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* | ARM64: dts: meson-gx: fix UART pclk clock nameNeil Armstrong2017-12-081-3/+3
|/ | | | | | | | | | | The clock-names for pclk was wrongly set to "core", but the bindings specifies "pclk". This was not cathed until the legacy non-documented bindings were removed. Reported-by: Andreas Färber <afaerber@suse.de> Fixes: f72d6f6037b7 ("ARM64: dts: meson-gx: use stable UART bindings with correct gate clock") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* Merge tag 'amlogic-dt64-2' of ↵Arnd Bergmann2017-10-301-0/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit DT updates for v4.15, round 2" from Kevin Hilman: - add support for new GPIO IRQ driver * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gx: add external PHY interrupt on some platforms ARM64: dts: meson-gx: add gpio interrupt controller ARM64: meson: enable MESON_IRQ_GPIO in Kconfig ARM64: dts: meson-gxbb-odroidc2: fix usb1 power supply
| * ARM64: dts: meson-gx: add gpio interrupt controllerJerome Brunet2017-10-291-0/+6
| | | | | | | | | | | | | | | | Add gpio interrupt controller to Amlogic GX family SoCs Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* | Merge tag 'amlogic-dt64' of ↵Arnd Bergmann2017-10-301-3/+17
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 64-bit platforms: DT updates for v4.15" from Kevin Hilman: - new SoC support: A113D - new boards: Tronsmart Vega S96, Khadas vim2 - reserved memory fixups - gpio-names cleanups - MMC cleanups, enable high-speed modes - misc cleanups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-axg: add initial A113D SoC DT support dt-bindings: arm: amlogic: Add Meson AXG binding ARM64: dts: meson-gx: remove unnecessary uart compatible ARM64: dts: meson-gx: remove unnecessary clocks properties ARM64: dts: meson-gxl: Add alternate ARM Trusted Firmware reserved memory zone ARM64: dts: meson-gxm: enable HS400 on the vim2 ARM64: dts: meson-gxbb-nexbox-a95x: Enable USB Nodes dt-bindings: arm: amlogic: Add Tronsmart Vega S96 binding ARM64: dts: meson-gxm: Add Vega S96 board ARM64: dts: meson-gxm: Add support for Khadas VIM2 ARM64: dts: meson-gxl: Take eMMC data strobe out of eMMC pins ARM64: dts: meson-gxl: adjust libretech-cc gpio-line-names ARM64: dts: meson-gxl: adjust kvim gpio-line-names ARM64: dts: meson-gxbb: adjust odroid-c2 gpio-line-names ARM64: dts: meson-gxbb: adjust nanopi-k2 gpio-line-names ARM64: dts: meson-gx: adjust gpio-ranges for TEST_N ARM64: dts: meson-gx: remove gpio offset ARM: dts: meson8: remove gpio offset ARM64: dts: meson-gxl-libretech-cc: enable internal phy leds ARM64: dts: meson-gxl-libretech-cc: enable saradc
| * ARM64: dts: meson-gxl: Add alternate ARM Trusted Firmware reserved memory zoneNeil Armstrong2017-10-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This year, Amlogic updated the ARM Trusted Firmware reserved memory mapping for Meson GXL SoCs and products sold since May 2017 uses this alternate reserved memory mapping. But products had been sold using the previous mapping. This issue has been explained in [1] and a dynamic solution is yet to be found to avoid loosing another 3Mbytes of reservable memory. In the meantime, this patch adds this alternate memory zone only for the GXL and GXM SoCs since GXBB based new products stopped earlier. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html Fixes: bba8e3f42736 ("ARM64: dts: meson-gx: Add firmware reserved memory zones") Reported-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * ARM64: dts: meson-gxl: Take eMMC data strobe out of eMMC pinsNeil Armstrong2017-10-121-2/+8
| | | | | | | | | | | | | | | | | | Since the Data Strobe pin is optional, take it out of the default eMMC pins and add a separate entry. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * ARM64: dts: meson-gx: adjust gpio-ranges for TEST_NJerome Brunet2017-10-121-1/+1
| | | | | | | | | | | | | | | | TEST_N has moved from the EE controller to the AO controller so the gpio-ranges need to adjusted for it Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * ARM64: dts: meson-gx: remove gpio offsetJerome Brunet2017-10-121-1/+1
|/ | | | | | | | Remove pin offset on the EE controller. Meson pinctrl no longer has this quirk Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson: add mmc clk gate pinsJerome Brunet2017-09-051-0/+33
| | | | | | | | | Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This is necessary to be able to gate the clk outside of the SoC while keeping it running in the controller Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: Use correct mmc clock source 0Jerome Brunet2017-09-051-3/+3
| | | | | | | | Now that the clock source 0 is properly described in the CCF, use it instead of assuming the default value (xtal) Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: Add AO CEC nodesNeil Armstrong2017-08-231-0/+6
| | | | | | | This patch adds the AO CEC node in all the HDMI enabled boards DTS. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: update AO clkc to new bindingsNeil Armstrong2017-08-231-0/+4
| | | | | | | | | | The AO clkc needs to be updated to new bindings with an system control parent node and moving the clkc node as subnode. Also adds the SoC specific compatible following the bindings requirements. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: use stable UART bindings with correct gate clockHelmut Klein2017-08-081-0/+25
| | | | | | | | | | This patch switches to the stable UART bindings but also add the correct gate clock to the non-AO UART nodes for GXBB and GXL SoCs. Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Helmut Klein <hgkr.klein@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: Add SPICC nodesNeil Armstrong2017-06-161-0/+7
| | | | | | | | Add nodes for the SPICC controller on GX common dtsi, GXBB and GXL dtsi files. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: Add SPI pinctrl nodesNeil Armstrong2017-05-311-0/+16
| | | | | | | This patch adds the SPICC Controller pins nodes for Amlogic GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: Add Ethernet PHY LEDS pins nodesNeil Armstrong2017-05-311-0/+14
| | | | | | | | The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs adds the Link and Activity LEDs signals pins nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: Add CEC pins nodesNeil Armstrong2017-05-311-0/+14
| | | | | | | Add the AO and EE domain CEC pins nodes for the Amlogic Meson GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: Fix GXL periphs pinctrl pull-enable register baseNeil Armstrong2017-05-311-1/+1
| | | | | | | | | | The pull-enable register base was wrongly copied from the GXBB pinctrl node, but was not used yet. Fixes: fb0fe92294a9 ("ARM64: dts: meson-gxl: Add pinctrl nodes") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: Fix pinctrl periphs gpio-rangesNeil Armstrong2017-05-311-1/+1
| | | | | | | | | | The gpio-range was badly added on the GXL dtsi, the AO pin count is 10 instead of 14. Fixes: 84412e4e857f ("ARM64: dts: meson-gxl: Add gpio-ranges properties") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* arm64: dts: meson-gxl: Fix node orderAndreas Färber2017-05-171-36/+36
| | | | | | | Sort nodes referenced by label alphabetically. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: Add support for HDMI outputNeil Armstrong2017-04-041-0/+13
| | | | | | | Add HDMI output and connector nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: add spdif output pinsjbrunet2017-03-281-0/+21
| | | | | | | | Add EE and AO domains pins for the spdif output to the gxl device tree. Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: add i2s output pinsjbrunet2017-03-281-0/+62
| | | | | | | | | Add EE and AO domains pins for the i2s output clocks and data the gxl device tree Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: Add gpio-ranges propertiesNeil Armstrong2017-03-281-0/+2
| | | | | | Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: Add missing pinctrl pins groupsNeil Armstrong2017-03-241-0/+32
| | | | | | | | Add pinctrl pins nodes following the additions of missing pins in the pinctrl driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: Finally move common nodes to GX dtsiNeil Armstrong2017-03-231-0/+8
| | | | | | | | Since we know the GXBB and GXL/GXM share more hardware, we can safely move the remaining peripheral nodes present in the GXBB dtsi to the common GX dtsi. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: amlogic: meson-gxl: add the missing PWM pinsMartin Blumenstingl2017-03-231-0/+56
| | | | | | | | | | | This adds the new DT nodes for the missing PWM pins in the EE and AO domain. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson: meson-gx: add the SAR ADCMartin Blumenstingl2017-01-301-0/+10
| | | | | | | | | | | | | | Add the SAR ADC to meson-gxbb.dtsi and meson-gxl.dtsi. GXBB provides a 10-bit ADC while GXL and GXM provide a 12-bit ADC. Some boards use resistor ladder buttons connected through one of the ADC channels. On newer devices (GXL and GXM) some boards use pull-ups/downs to change the resistance (and thus the ADC value) on one of the ADC channels to indicate the board revision. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gxl: add the pwm_ao_b pinMartin Blumenstingl2017-01-271-0/+7
| | | | | | | | | This adds the pwm_ao_b pin to allow boards which have an LED connected to GPIOAO_9 to use the leds-pwm driver (by activating the pwm_AO_ab node and passing the pwm_ao_b_pin pinctrl-reference). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodesNeil Armstrong2017-01-181-0/+14
| | | | | | | | | Add pinctrl nodes for HDMI HPD and DDC pins modes for Amlogic Meson GXL and GXBB SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* ARM64: dts: meson-gx: add the serial CTS and RTS pin groupsMartin Blumenstingl2017-01-181-0/+40
| | | | | | | | | | | This adds pinctrl group nodes for the CTS and RTS pins of each serial controller. This makes it possible to enable the CTS and RTS pins which are controlled by the serial controller hardware (through the meson_uart driver). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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