| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | arm64: cache: Merge cachetype.h into cache.h | Will Deacon | 2017-03-20 | 1 | -55/+0 |
| * | arm64: cache: Remove support for ASID-tagged VIVT I-caches | Will Deacon | 2017-03-20 | 1 | -8/+0 |
| * | arm64: cacheinfo: Remove CCSIDR-based cache information probing | Will Deacon | 2017-03-20 | 1 | -24/+0 |
| * | arm64: cpuinfo: remove I-cache VIPT aliasing detection | Will Deacon | 2017-03-20 | 1 | -13/+0 |
| * | arm64: cachetype: fix definitions of ICACHEF_* flags | Will Deacon | 2015-10-28 | 1 | -2/+2 |
| * | arm64: kernel: add support for cpu cache information | Sudeep Holla | 2015-01-15 | 1 | -6/+23 |
| * | arm64: add helper functions to read I-cache attributes | Ard Biesheuvel | 2014-09-08 | 1 | -0/+20 |
| * | arm64: cachetype: report weakest cache policy | Mark Rutland | 2014-07-18 | 1 | -6/+10 |
| * | arm64: Implement cache_line_size() based on CTR_EL0.CWG | Catalin Marinas | 2014-05-09 | 1 | -0/+11 |
| * | arm64: Cache maintenance routines | Catalin Marinas | 2012-09-17 | 1 | -0/+48 |
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index : openslx/kernel-qcow2-linux.git | |
| In-kernel qcow2 (Kernel part) | OpenSLX |
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