summaryrefslogtreecommitdiffstats
path: root/arch/arm64/kernel/entry.S
Commit message (Expand)AuthorAgeFilesLines
* arm64: entry: remove unused register aliasesMark Rutland2019-01-031-11/+1Star
* arm64: preempt: Fix big-endian when checking preempt count in assemblyWill Deacon2018-12-111-4/+2Star
* arm64: entry: Remove confusing commentWill Deacon2018-12-061-4/+0Star
* arm64: entry: Place an SB sequence following an ERET instructionWill Deacon2018-12-061-0/+2
* arm64: Trap WFI executed in userspaceMarc Zyngier2018-10-011-0/+1
* arm64: compat: Add separate CP15 trapping hookMarc Zyngier2018-10-011-2/+13
* arm64: entry: Allow handling of undefined instructions from EL1Will Deacon2018-09-141-1/+1
* arm64: Add support for STACKLEAK gcc pluginLaura Abbott2018-07-261-0/+3
* arm64: zero GPRs upon entry from EL0Mark Rutland2018-07-121-1/+7
* arm64: don't reload GPRs after apply_ssbdMark Rutland2018-07-121-13/+7Star
* arm64: don't restore GPRs when context trackingMark Rutland2018-07-121-11/+1Star
* arm64: convert native/compat syscall entry to CMark Rutland2018-07-121-38/+4Star
* arm64: convert syscall trace logic to CMark Rutland2018-07-121-53/+2Star
* arm64: convert raw syscall invocation to CMark Rutland2018-07-121-26/+10Star
* arm64: remove sigreturn wrappersMark Rutland2018-07-121-8/+0Star
* arm64: rseq: Implement backend rseq calls and select HAVE_RSEQWill Deacon2018-07-111-0/+2
* arm64: ssbd: Introduce thread flag to control userspace mitigationMarc Zyngier2018-05-311-0/+2
* arm64: ssbd: Skip apply_ssbd if not using dynamic mitigationMarc Zyngier2018-05-311-0/+3
* arm64: Add per-cpu infrastructure to call ARCH_WORKAROUND_2Marc Zyngier2018-05-311-4/+7
* arm64: Call ARCH_WORKAROUND_2 on transitions between EL0 and EL1Marc Zyngier2018-05-311-0/+22
* Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2018-02-081-13/+16
|\
| * arm64: entry: Apply BP hardening for suspicious interrupts from EL0Will Deacon2018-02-061-0/+5
| * arm64: entry: Apply BP hardening for high-priority synchronous exceptionsWill Deacon2018-02-061-1/+4
| * arm64: entry: Ensure branch through syscall table is bounded under speculationWill Deacon2018-02-061-0/+2
| * arm64: Make USER_DS an inclusive limitRobin Murphy2018-02-061-2/+2
| * arm64: entry: Reword comment about post_ttbr_update_workaroundWill Deacon2018-02-061-10/+3Star
* | Merge branch 'linus' into sched/urgent, to resolve conflictsIngo Molnar2018-02-061-31/+365
|\|
| * arm64: kpti: Fix the interaction between ASID switching and software PANCatalin Marinas2018-01-161-1/+1
| * arm64: entry: Move the trampoline to be before PANSteve Capper2018-01-141-2/+2
| * arm64: sdei: Add trampoline code for remapping the kernelJames Morse2018-01-141-11/+87
| * arm64: kernel: Add arch-specific SDEI entry code and CPU maskingJames Morse2018-01-131-0/+101
| * arm64: Add skeleton to harden the branch predictor against aliasing attacksWill Deacon2018-01-081-2/+5
| * arm64: Move post_ttbr_update_workaround to C codeMarc Zyngier2018-01-081-1/+1
| * arm64: use RET instruction for exiting the trampolineWill Deacon2018-01-081-1/+9
| * arm64: kaslr: Put kernel vectors address in separate data pageWill Deacon2017-12-111-0/+14
| * arm64: mm: Introduce TTBR_ASID_MASK for getting at the ASID in the TTBRWill Deacon2017-12-111-1/+1
| * arm64: entry: Add fake CPU feature for unmapping the kernel at EL0Will Deacon2017-12-111-4/+5
| * arm64: erratum: Work around Falkor erratum #E1003 in trampoline codeWill Deacon2017-12-111-0/+12
| * arm64: entry: Hook up entry trampoline to exception vectorsWill Deacon2017-12-111-3/+36
| * arm64: entry: Explicitly pass exception level to kernel_ventry macroWill Deacon2017-12-111-23/+23
| * arm64: entry: Add exception trampoline page for exceptions from EL0Will Deacon2017-12-111-0/+86
| * arm64: mm: Fix and re-enable ARM64_SW_TTBR0_PANWill Deacon2017-12-111-2/+2
| * arm64: mm: Rename post_ttbr0_update_workaroundWill Deacon2017-12-111-1/+1
* | membarrier/arm64: Provide core serializing commandMathieu Desnoyers2018-02-051-0/+4
|/
* arm64/sve: Detect SVE and activate runtime supportDave Martin2017-11-031-3/+4
* arm64/sve: Core task context handlingDave Martin2017-11-031-3/+36
* arm64: entry.S: move SError handling into a C function for future expansionXie XiuQi2017-11-021-7/+29
* arm64: entry.S: convert elX_irqJames Morse2017-11-021-2/+2
* arm64: entry.S convert el0_syncJames Morse2017-11-021-14/+10Star
* arm64: entry.S: convert el1_syncJames Morse2017-11-021-8/+4Star