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* mm: vmalloc: pass additional vm_flags to __vmalloc_node_range()Andrey Ryabinin2015-02-141-1/+1
* all arches, signal: move restart_block to struct task_structAndy Lutomirski2015-02-133-3/+2Star
* MIPS: Fix syscall_get_nr for the syscall exit tracing.Lars Persson2015-02-041-0/+2
* MIPS: fork: Fix MSA/FPU/DSP context duplication raceJames Hogan2015-01-311-12/+24
* MIPS: traps: Fix inline asm ctc1 missing .set hardfloatJames Hogan2015-01-301-1/+2
* MIPS: Fix kernel lockup or crash after CPU offline/onlineHemmo Nieminen2015-01-291-1/+1
* MIPS: IRQ: Fix disable_irq on CPU IRQsFelix Fietkau2015-01-161-0/+4
* MIPS: smp-mt,smp-cmp: Enable all HW IRQs on secondary CPUsJames Hogan2015-01-162-3/+4
* MIPS: Fix restart of indirect syscallsEd Swierk2015-01-162-0/+2
* MIPS: ELF: fix loading o32 binaries on 64-bit kernelsJames Cowgill2015-01-151-4/+4
* MIPS: Wire up execveat(2).Ralf Baechle2015-01-134-0/+4
* MIPS: Use phys_addr_t instead of phys_tJaedon Shin2014-12-131-1/+1
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-1226-700/+550Star
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| * MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle2014-11-243-13/+13
| * MIPS: Enable VDSO randomizationPrem Karat2014-11-241-1/+14
| * MIPS: Apply `.insn' to fixup labels throughoutMaciej W. Rozycki2014-11-241-0/+2
| * MIPS: signal.c: Fix an invalid cast in ISA mode bit handlingMaciej W. Rozycki2014-11-241-1/+1
| * MIPS: traps: Dump the PageGrain and Wired registers on MCMarkos Chandras2014-11-241-0/+2
| * MIPS: traps: Dump the HTW registers on a MC exceptionMarkos Chandras2014-11-241-0/+5
| * MIPS: traps: Replace printk with pr_err for MC exceptionsMarkos Chandras2014-11-241-6/+6
| * clocksource: mips-gic: Combine with GIC clockevent driverAndrew Bresticker2014-11-242-104/+0Star
| * MIPS: Move GIC clocksource driver to drivers/clocksource/Andrew Bresticker2014-11-242-33/+0Star
| * MIPS: Create a helper function for DT setupKevin Cernekee2014-11-241-0/+18
| * MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)Kevin Cernekee2014-11-241-0/+1
| * MIPS: BMIPS: Let each platform customize the CPU1 IRQ maskKevin Cernekee2014-11-241-2/+4
| * MIPS: BMIPS: Explicitly configure reset vectors prior to secondary bootKevin Cernekee2014-11-241-21/+8Star
| * MIPS: BMIPS: Mask off timer IRQs when hot-unplugging a CPUJon Fraser2014-11-241-0/+1
| * MIPS: BMIPS: Allow BMIPS3300 to utilize SMP ebase relocation codeJon Fraser2014-11-241-0/+1
| * MIPS: BMIPS: Introduce helper function to change the reset vectorKevin Cernekee2014-11-241-7/+58
| * MIPS: BMIPS: Align secondary boot sequence with latest firmware releasesKevin Cernekee2014-11-241-11/+1Star
| * MIPS: Kconfig option to better exercise/debug hybrid FPRsPaul Burton2014-11-241-0/+18
| * MIPS: ELF: Set FP mode according to .MIPS.abiflagsPaul Burton2014-11-242-3/+177
| * MIPS: Support for hybrid FPRsPaul Burton2014-11-241-0/+47
| * MIPS: Ensure Config5.UFE is clear on bootPaul Burton2014-11-241-1/+1
| * MIPS: detect presence of the FRE & UFR bitsPaul Burton2014-11-241-0/+2
| * MIPS: Remove __strlen_user().Ralf Baechle2014-11-241-4/+0Star
| * MIPS: Move gic.h to include/linux/irqchip/mips-gic.hAndrew Bresticker2014-11-247-8/+7Star
| * irqchip: mips-gic: Export function to read counter widthAndrew Bresticker2014-11-241-8/+1Star
| * irqchip: mips-gic: Support local interruptsAndrew Bresticker2014-11-242-10/+7Star
| * irqchip: mips-gic: Stop using per-platform mapping tablesAndrew Bresticker2014-11-241-1/+2
| * MIPS: Move GIC to drivers/irqchip/Andrew Bresticker2014-11-244-406/+3Star
| * MIPS: smp-cps: Enable all hardware interrupts on secondary CPUsAndrew Bresticker2014-11-241-2/+2
| * MIPS: Add hook to get C0 performance counter interruptAndrew Bresticker2014-11-241-16/+7Star
| * MIPS: i8259: Use IRQ domainsAndrew Bresticker2014-11-241-5/+19
| * MIPS: Set vint handler when mapping CPU interruptsAndrew Bresticker2014-11-241-0/+4
| * MIPS: Provide a generic plat_irq_dispatchAndrew Bresticker2014-11-241-0/+18
| * MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init()Andrew Bresticker2014-11-241-2/+2
| * MIPS: Always use IRQ domains for CPU IRQsAndrew Bresticker2014-11-241-25/+11Star
| * MIPS: cpu: Add 'noftlb' kernel command line option to disable the FTLBMarkos Chandras2014-11-241-2/+62
| * mips: Convert pr_warning to pr_warnJoe Perches2014-11-243-7/+6Star
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