summaryrefslogtreecommitdiffstats
path: root/arch/riscv/include
Commit message (Expand)AuthorAgeFilesLines
* riscv: fix accessing 8-byte variable from RV32Alan Kao2019-05-081-1/+1
* riscv: Fix syscall_get_arguments() and syscall_set_arguments()Dmitry V. Levin2019-04-171-5/+7
* riscv: Adjust mmap base address at a third of task sizeAlexandre Ghiti2019-03-131-1/+1
* riscv: Add pte bit to distinguish swap from invalidStefan O'Rear2019-02-202-4/+10
* riscv: fix warning in arch/riscv/include/asm/module.hDavid Abdurachmanov2018-12-131-0/+1
* RISC-V: Fix raw_copy_{to,from}_user()Olof Johansson2018-11-271-2/+2
* RISC-V: include linux/ftrace.h in asm-prototypes.hJames Cowgill2018-09-241-0/+7
* riscv: tlb: Provide definition of tlb_flush() before including tlb.hWill Deacon2018-08-281-0/+4
* RISC-V: Fix sys_riscv_flush_icachePalmer Dabbelt2018-08-203-7/+13
|\
| * RISC-V: Don't use a global include guard for uapi/asm/syscalls.hPalmer Dabbelt2018-08-202-5/+13
| * RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt2018-08-201-2/+0Star
* | riscv: Delete asm/compat.hDeepa Dinamani2018-08-202-29/+1Star
|/
* Merge tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2018-08-194-10/+3Star
|\
| * RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra2018-08-131-0/+1
| * clocksource: new RISC-V SBI timer driverPalmer Dabbelt2018-08-131-3/+0Star
| * RISC-V: add a definition for the SIE SEIE bitChristoph Hellwig2018-08-131-0/+1
| * RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.hChristoph Hellwig2018-08-131-4/+0Star
| * RISC-V: simplify software interrupt / IPI codeChristoph Hellwig2018-08-132-3/+1Star
* | locking/atomics: Rework ordering barriersMark Rutland2018-07-251-12/+5Star
* | Merge tag 'v4.18-rc5' into locking/core, to pick up fixesIngo Molnar2018-07-171-2/+7
|\|
| * RISC-V: Add definiion of extract symbol's index and type for 32-bitZong Li2018-07-041-2/+7
* | atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland2018-06-211-76/+0Star
* | atomics/treewide: Make test ops optionalMark Rutland2018-06-211-46/+0Star
* | atomics/riscv: Define atomic64_fetch_add_unless()Mark Rutland2018-06-211-6/+2Star
* | atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland2018-06-211-0/+1
* | atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland2018-06-211-7/+0Star
* | atomics/treewide: Remove redundant atomic_inc_not_zero() definitionsMark Rutland2018-06-211-9/+0Star
* | atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland2018-06-211-2/+2
|/
* Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds2018-06-155-5/+92
|\
| * RISC-V: Make our port sparse-cleanPalmer Dabbelt2018-06-113-5/+7
| |\
| | * riscv: split the declaration of __copy_userLuc Van Oostenryck2018-06-091-3/+5
| | * riscv: use NULL instead of a plain 0Luc Van Oostenryck2018-06-072-2/+2
| * | perf: riscv: preliminary RISC-V supportAlan Kao2018-06-042-0/+85
| |/
* | mm: introduce ARCH_HAS_PTE_SPECIALLaurent Dufour2018-06-081-3/+0Star
* | riscv: add swiotlb supportChristoph Hellwig2018-05-191-0/+15
* | PCI: remove PCI_DMA_BUS_IS_PHYSChristoph Hellwig2018-05-071-3/+0Star
|/
* riscv: there is no <asm/handle_irq.h>Christoph Hellwig2018-04-241-1/+0Star
* Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2018-04-058-234/+806
|\
| * RISC-V: Fixes to module loadingPalmer Dabbelt2018-04-032-0/+120
| |\
| | * RISC-V: Add definition of relocation typesZong Li2018-04-031-0/+7
| | * RISC-V: Add section of GOT.PLT for kernel moduleZong Li2018-04-031-15/+25
| | * RISC-V: Add sections of PLT and GOT for kernel moduleZong Li2018-04-031-0/+103
| * | RISC-V: Assorted memory model fixesPalmer Dabbelt2018-04-035-234/+630
| |\ \
| | * | riscv/atomic: Strengthen implementations with fencesAndrea Parri2018-04-032-220/+588
| | * | riscv/spinlock: Strengthen implementations with fencesAndrea Parri2018-04-032-14/+27
| | * | riscv/barrier: Define __smp_{store_release,load_acquire}Andrea Parri2018-04-031-0/+15
| | |/
| * | riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS supportAlan Kao2018-04-031-0/+1
| * | riscv/ftrace: Add ARCH_SUPPORTS_FTRACE_OPS supportAlan Kao2018-04-031-0/+1
| * | riscv/ftrace: Add dynamic function tracer supportAlan Kao2018-04-031-0/+54
| |/
* / RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handlerPalmer Dabbelt2018-03-141-0/+1
|/
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-06-27 21:31:50 +0200