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path: root/arch/riscv/kernel/smp.c
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner2019-06-191-12/+1Star
* riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo2019-05-171-49/+0Star
* RISC-V: Access CSRs using CSR numbersAnup Patel2019-05-171-1/+1
* RISC-V: Fix minor checkpatch issues.Atish Patra2019-05-171-2/+2
* RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra2019-04-301-0/+6
* RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt2019-03-041-1/+1
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* | RISC-V: Allow hartid-to-cpuid function to fail.Atish Patra2019-03-041-1/+0Star
* | RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra2019-03-041-0/+9
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* riscv: don't stop itself in smp_send_stopAndreas Schwab2019-01-071-7/+36
* RISC-V: Show IPI statsAnup Patel2018-10-231-7/+32
* RISC-V: Use Linux logical CPU number instead of hartidAtish Patra2018-10-231-9/+15
* RISC-V: Add logical CPU indexing for RISC-VAtish Patra2018-10-231-0/+19
* RISC-V: simplify software interrupt / IPI codeChristoph Hellwig2018-08-131-4/+2Star
* RISC-V: Fixes for clean allmodconfig buildPalmer Dabbelt2017-12-011-0/+7
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| * RISC-V: Provide stub of setup_profiling_timer()Olof Johansson2017-11-301-0/+7
* | RISC-V: Flush I$ when making a dirty page executableAndrew Waterman2017-11-301-0/+48
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* RISC-V: Init and Halt CodePalmer Dabbelt2017-09-271-0/+110