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path: root/arch/riscv/kernel/smpboot.c
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1Star
* RISC-V: Support nr_cpus command line option.Atish Patra2019-05-171-1/+9
* RISC-V: Implement nosmp commandline option.Atish Patra2019-04-301-1/+11
* RISC-V: Compare cpuid with NR_CPUS before mapping.Atish Patra2019-03-041-0/+5
* RISC-V: Do not wait indefinitely in __cpu_upAtish Patra2019-03-041-3/+12
* riscv: use for_each_of_cpu_node iteratorJohan Hovold2019-02-121-2/+2
* RISC-V: fix bad use of of_node_putAndreas Schwab2019-01-231-5/+1Star
* RISC-V: Fix of_node_* refcountAtish Patra2018-12-211-1/+5
* RISC-V: Use Linux logical CPU number instead of hartidAtish Patra2018-10-231-9/+16
* RISC-V: Use WRITE_ONCE instead of direct accessAtish Patra2018-10-231-2/+3
* RISC-V: Use mmgrab()Palmer Dabbelt2018-10-231-1/+2
* RISC-V: Rename im_okay_therefore_i_am to found_boot_cpuPalmer Dabbelt2018-10-231-4/+5
* RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt2018-10-231-1/+1
* RISC-V: Disable preemption before enabling interruptsAtish Patra2018-10-231-1/+5
* RISC-V: Comment on the TLB flush in smp_callin()Palmer Dabbelt2018-10-231-0/+4
* clocksource: new RISC-V SBI timer driverPalmer Dabbelt2018-08-131-1/+0Star
* RISC-V: Init and Halt CodePalmer Dabbelt2017-09-271-0/+114