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* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-216-0/+6
* Merge tag 'kbuild-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ma...Linus Torvalds2019-05-191-4/+0Star
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| * arch: remove dangling asm-generic wrappersMasahiro Yamada2019-05-181-4/+0Star
* | Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2019-05-1934-320/+584
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| * riscv: fix locking violation in page fault handlerAndreas Schwab2019-05-171-1/+2
| * RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCsYash Shah2019-05-173-0/+192
| * RISC-V: Avoid using invalid intermediate translationsPalmer Dabbelt2019-05-171-2/+10
| * riscv: Support BUG() in kernel moduleVincent Chen2019-05-171-1/+1
| * riscv: Add the support for c.ebreak check in is_valid_bugaddr()Vincent Chen2019-05-172-4/+23
| * riscv: support trap-based WARN()Vincent Chen2019-05-171-10/+18
| * riscv: fix sbi_remote_sfence_vma{,_asid}.Gary Guo2019-05-171-7/+12
| * riscv: move switch_mm to its own fileGary Guo2019-05-173-52/+72
| * riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo2019-05-173-50/+62
| * RISC-V: Access CSRs using CSR numbersAnup Patel2019-05-179-48/+57
| * RISC-V: Add interrupt related SCAUSE defines in asm/csr.hAnup Patel2019-05-172-16/+21
| * RISC-V: Use tabs to align macro values in asm/csr.hAnup Patel2019-05-171-38/+38
| * RISC-V: Fix minor checkpatch issues.Atish Patra2019-05-171-2/+2
| * RISC-V: Support nr_cpus command line option.Atish Patra2019-05-171-1/+9
| * RISC-V: Implement nosmp commandline option.Atish Patra2019-04-301-1/+11
| * RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra2019-04-302-2/+7
| * riscv: vdso: drop unnecessary cc-ldoptionNick Desaulniers2019-04-301-1/+1
| * riscv: call pm_power_off from machine_halt / machine_power_offChristoph Hellwig2019-04-251-6/+9
| * riscv: print the unexpected interrupt causeChristoph Hellwig2019-04-251-1/+2
| * riscv: remove duplicate macros from ptrace.hChristoph Hellwig2019-04-253-21/+12Star
| * riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR codeChristoph Hellwig2019-04-251-4/+0Star
| * riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig2019-04-252-4/+5
| * riscv: simplify the stack pointer setup in head.SChristoph Hellwig2019-04-252-7/+1Star
| * riscv: clear all pending interrupts when bootingChristoph Hellwig2019-04-251-1/+2
| * riscv: remove CONFIG_RISCV_ISA_AChristoph Hellwig2019-04-253-21/+3Star
| * riscv: remove unreachable big endian codeChristoph Hellwig2019-04-252-14/+1Star
| * riscv: turn mm_segment_t into a structChristoph Hellwig2019-04-252-6/+10
| * riscv: use asm-generic/extable.hChristoph Hellwig2019-04-252-6/+2Star
| * riscv/signal: Fixup additional syscall restartingGuo Ren2019-04-251-0/+6
* | riscv: switch over to generic free_initmem()Mike Rapoport2019-05-141-5/+0Star
* | Merge tag 'audit-pr-20190507' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2019-05-081-1/+1
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| * | syscall_get_arch: add "struct task_struct *" argumentDmitry V. Levin2019-03-211-1/+1
* | | Merge tag 'arm64-mmiowb' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...Linus Torvalds2019-05-073-13/+17
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| * | | riscv/mmiowb: Hook up mmwiob() implementation to asm-generic codeWill Deacon2019-04-084-14/+17
| * | | arch: Use asm-generic header for asm/mmiowb.hWill Deacon2019-04-081-0/+1
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* | | Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2019-05-061-3/+0Star
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| * \ \ Merge branch 'linus' into locking/core, to pick up fixesIngo Molnar2019-04-108-32/+43
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| * | | | locking/rwsem: Remove rwsem-spinlock.c & use rwsem-xadd.c for all archsWaiman Long2019-04-031-3/+0Star
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* | | | Merge branch 'core-stacktrace-for-linus' of git://git.kernel.org/pub/scm/linu...Linus Torvalds2019-05-061-2/+0Star
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| * | | | riscv/stacktrace: Remove the pointless ULONG_MAX markerThomas Gleixner2019-04-141-2/+0Star
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* | | | Merge branch 'core-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2019-05-061-0/+1
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| * | | asm-generic/tlb, arch: Provide generic tlb_flush() based on flush_tlb_range()Peter Zijlstra2019-04-031-0/+1
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* | | RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systemsAnup Patel2019-04-101-0/+8
* | | RISC-V: Add separate defconfig for 32bit systemsAnup Patel2019-04-091-0/+84
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* | Merge tag 'trace-5.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ro...Linus Torvalds2019-04-061-18/+6Star
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| * | syscalls: Remove start and number from syscall_set_arguments() argsSteven Rostedt (VMware)2019-04-051-10/+3Star
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