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path: root/arch/x86/kernel/cpu/perf_event_intel_lbr.c
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* perf/x86: Move perf_event_intel_lbr.c ........ => x86/events/intel/lbr.cBorislav Petkov2016-02-171-1062/+0Star
* perf/x86/intel: Add perf core PMU support for Intel Knights LandingHarish Chegondi2016-01-061-0/+14
* perf/x86: Fix LBR related crashes on Intel AtomStephane Eranian2016-01-061-4/+7
* perf/x86: Add option to disable reading branch flags/cyclesAndi Kleen2015-11-231-2/+17
* perf/x86: Fix LBR call stack save/restoreAndi Kleen2015-11-231-1/+3
* perf/x86: Add support for PERF_SAMPLE_BRANCH_CALLStephane Eranian2015-10-201-0/+4
* perf/x86/intel: Fix static checker warning in lbr enableKan Liang2015-09-181-2/+3
* perf/x86/intel: Fix LBR callstack issue caused by FREEZE_LBRS_ON_PMIKan Liang2015-09-131-3/+2Star
* perf/x86/intel/lbr: Limit LBR accesses to TOS in callstack modeAndi Kleen2015-08-041-3/+7
* perf/x86/intel/lbr: Use correct index to save/restore LBR_INFO with call stackAndi Kleen2015-08-041-2/+2
* perf/x86/intel: Add Intel Skylake PMU supportAndi Kleen2015-08-041-0/+20
* perf/x86/intel/lbr: Optimize v4 LBR unfreezingAndi Kleen2015-08-041-0/+7
* perf/x86/intel/lbr: Add support for LBRv5Andi Kleen2015-08-041-1/+20
* perf/x86/intel: Drain the PEBS buffer during context switchesYan, Zheng2015-06-071-3/+0Star
* perf/x86/intel: add support for PERF_SAMPLE_BRANCH_IND_JUMPStephane Eranian2015-06-071-1/+9
* perf/x86/intel: Avoid rewriting DEBUGCTL with the same value for LBRsAndi Kleen2015-04-021-2/+4
* perf/x86/intel: Streamline LBR MSR handling in PMIAndi Kleen2015-04-021-4/+8
* perf/x86/intel: Expose LBR callstack to user space toolingPeter Zijlstra2015-02-181-4/+4
* perf/x86/intel: Discard zero length call entries in LBR call stackYan, Zheng2015-02-181-2/+11
* perf/x86/intel: Disable FREEZE_LBRS_ON_PMI when LBR operates in callstack modeYan, Zheng2015-02-181-4/+13
* perf/x86/intel: Save/restore LBR stack during context switchYan, Zheng2015-02-181-12/+76
* perf/x86/intel: Track number of events that use the LBR callstackYan, Zheng2015-02-181-0/+19
* perf/x86/intel: Add basic Haswell LBR call stack supportYan, Zheng2015-02-181-22/+69
* perf/x86/intel: Use context switch callback to flush LBR stackYan, Zheng2015-02-181-0/+27
* perf/x86/intel: Reduce lbr_sel_map[] sizeYan, Zheng2015-02-181-29/+25Star
* x86: Remove arbitrary instruction size limit in instruction decoderDave Hansen2014-11-181-6/+19
* Merge branch 'for-3.18-consistent-ops' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds2014-10-151-6/+6
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| * x86: Replace __get_cpu_var usesChristoph Lameter2014-08-261-6/+6
* | perf/x86/intel: Mark initialization code as suchMathias Krause2014-09-091-4/+4
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* perf/x86: Add conditional branch filtering supportAnshuman Khandual2014-06-051-0/+5
* perf: Fix arch_perf_out_copy_user defaultPeter Zijlstra2013-11-061-1/+1
* perf/x86: Suppress duplicated abort LBR recordsAndi Kleen2013-10-041-8/+21
* perf/x86/intel: Support Haswell/v4 LBR formatAndi Kleen2013-06-191-5/+51
* perf/x86: Check branch sampling priv level in generic codeStephane Eranian2013-05-281-10/+3Star
* perf/x86/intel/lbr: Demand proper privileges for PERF_SAMPLE_BRANCH_KERNELPeter Zijlstra2013-05-051-3/+10
* perf/x86/intel/lbr: Fix LBR filterPeter Zijlstra2013-05-041-2/+12
* perf/x86: Enable Intel Cedarview Atom suppportStephane Eranian2012-09-041-1/+2
* perf/x86: Add LBR software filter support for Intel CPUsStephane Eranian2012-03-051-22/+310
* perf/x86: Implement PERF_SAMPLE_BRANCH for Intel CPUsStephane Eranian2012-03-051-2/+84
* perf/x86: Disable LBR support for older Intel Atom processorsStephane Eranian2012-03-051-0/+10
* perf/x86: Add Intel LBR mappings for PERF_SAMPLE_BRANCH filtersStephane Eranian2012-03-051-2/+101
* perf/x86: Add Intel LBR MSR definitionsStephane Eranian2012-03-051-9/+9
* perf: Add generic taken branch sampling supportStephane Eranian2012-03-051-8/+13
* perf: Remove deprecated WARN_ON_ONCE()Stephane Eranian2012-02-031-2/+0Star
* x86, perf: Clean up perf_event cpu codeKevin Winchester2011-09-261-12/+16
* perf, x86: Clean up debugctlmsr bit definitionsPeter Zijlstra2010-03-261-5/+2Star
* perf, x86: Fix LBR read-outPeter Zijlstra2010-03-101-2/+2
* perf, x86: Don't reset the LBR as frequentlyPeter Zijlstra2010-03-101-5/+4Star
* perf, x86: Fix LBR enable/disable vs cpuc->enabledPeter Zijlstra2010-03-101-3/+4
* perf, x86: Clear the LBRs on initPeter Zijlstra2010-03-101-0/+3
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