summaryrefslogtreecommitdiffstats
path: root/arch/x86/pci/intel_mid_pci.c
Commit message (Expand)AuthorAgeFilesLines
* Revert "x86/PCI: Refine the way to release PCI IRQ resources"Rafael J. Wysocki2015-03-201-2/+2
* Merge tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2015-02-111-2/+2
|\
| * x86/PCI: Refine the way to release PCI IRQ resourcesJiang Liu2015-02-051-2/+2
* | spi: dw-pci: describe Intel MID controllers betterAndy Shevchenko2015-01-071-1/+0Star
|/
* x86, irq: Keep balance of IOAPIC pin reference countJiang Liu2014-12-161-1/+9
* x86, irq, PCI: Keep IRQ assignment for runtime power managementJiang Liu2014-08-291-1/+1
* x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernationJiang Liu2014-08-081-1/+1
* x86, irq, SFI: Release IOAPIC pin when PCI device is disabledJiang Liu2014-06-211-0/+7
* x86, irq, SFI: Use common irqdomain map interface to program IOAPIC pinsJiang Liu2014-06-211-12/+7Star
* x86, SFI, irq: Provide basic irqdomain supportJiang Liu2014-06-211-0/+3
* x86, intel-mid: Add Merrifield platform supportDavid Cohen2014-01-151-1/+5
* intel_mid: Renamed *mrst* to *intel_mid*Kuppuswamy Sathyanarayanan2013-10-181-6/+6
* pci: intel_mid: Return true/false in function returning boolFengguang Wu2013-10-181-3/+3
* intel_mid: Renamed *mrst* to *intel_mid*Kuppuswamy Sathyanarayanan2013-10-181-0/+310