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path: root/drivers/clk/bcm/clk-bcm2835.c
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* clk: bcm2835: Fix PLL poweronEric Anholt2016-04-201-0/+4
* clk: bcm2835: Fix compiler warnings on 64-bit buildsEric Anholt2016-04-201-4/+4
* clk: bcm2835: add missing osc and per clocksMartin Sperl2016-03-171-0/+90
* clk: bcm2835: add missing PLL clock dividersMartin Sperl2016-03-171-0/+32
* clk: bcm2835: enable management of PCM clockMartin Sperl2016-03-171-0/+7
* clk: bcm2835: reorganize bcm2835_clock_array assignmentMartin Sperl2016-03-171-459/+393Star
* clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driverMartin Sperl2016-03-171-73/+94
* clk: bcm2835: expose raw clock-registers via debugfsMartin Sperl2016-03-171-0/+101
* clk: bcm2835: clean up coding style issuesMartin Sperl2016-03-171-6/+2Star
* clk: bcm2835: correctly enable fractional clock supportMartin Sperl2016-03-171-6/+39
* clk: bcm2835: divider value has to be 1 or moreMartin Sperl2016-03-171-2/+3
* clk: bcm2835: add locking to pll*_on/off methodsMartin Sperl2016-03-171-0/+4
* clk: bcm2835: pll_off should only update CM_PLL_ANARSTMartin Sperl2016-03-171-2/+8
* clk: bcm: Remove CLK_IS_ROOTStephen Boyd2016-03-031-6/+3Star
* clk: bcm2835: added missing clock register definitionsMartin Sperl2016-02-261-0/+13
* clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()Eric Anholt2016-02-161-11/+2Star
* clk: bcm2835: Fix setting of PLL divider clock ratesEric Anholt2016-02-161-5/+7
* clk: bcm2835: Add PWM clock supportRemi Pommarel2015-12-251-0/+13
* clk: bcm2835: Support for clock parent selectionRemi Pommarel2015-12-251-45/+77
* clk: bcm2835: add a round up ability to the clock divisorRemi Pommarel2015-12-251-10/+12
* clk: bcm2835: Add support for programming the audio domain clocksEric Anholt2015-10-121-1/+1521
* clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.Eric Anholt2015-10-021-0/+55