| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 2019-06-19 | 3 | -14/+3 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 | Thomas Gleixner | 2019-06-05 | 1 | -4/+1 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 2019-05-30 | 2 | -21/+2 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | Thomas Gleixner | 2019-05-30 | 1 | -5/+1 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 | Thomas Gleixner | 2019-05-21 | 5 | -65/+5 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1 | Thomas Gleixner | 2019-05-21 | 5 | -75/+5 |
| * | treewide: Add SPDX license identifier - Makefile/Kconfig | Thomas Gleixner | 2019-05-21 | 1 | -0/+1 |
| * | clk: Remove io.h from clk-provider.h | Stephen Boyd | 2019-05-15 | 1 | -0/+1 |
| *-. | Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a... | Stephen Boyd | 2019-05-07 | 1 | -1/+5 |
| |\ \ |
|
| | * | | clk: hi3660: Mark clk_gate_ufs_subsys as critical | Leo Yan | 2019-04-20 | 1 | -1/+5 |
| | |/ |
|
| * / | clk: core: replace clk_{readl,writel} with {readl,writel} | Jonas Gorski | 2019-04-23 | 1 | -2/+2 |
| |/ |
|
| * | clk: hisilicon: Remove usage of CLK_IS_BASIC | Stephen Boyd | 2018-12-10 | 4 | -4/+4 |
| *-. | Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-next | Stephen Boyd | 2018-10-19 | 3 | -0/+1024 |
| |\ \ |
|
| | | * | clk: hisilicon: Add clock driver for Hi3670 SoC | Manivannan Sadhasivam | 2018-10-16 | 3 | -0/+1024 |
| | |/ |
|
| * / | reset: hisilicon: fix potential NULL pointer dereference | Gustavo A. R. Silva | 2018-08-31 | 1 | -3/+2 |
| |/ |
|
| *-. | Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and... | Stephen Boyd | 2018-06-04 | 1 | -5/+8 |
| |\ \ |
|
| | | * | clk/driver/hisi: Consolidate the Kconfig for the CLOCK_STUB | Daniel Lezcano | 2018-06-01 | 1 | -5/+8 |
| | |/ |
|
| * / | clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC | Jianguo Sun | 2018-05-16 | 1 | -0/+17 |
| |/ |
|
| * | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2018-04-14 | 6 | -38/+232 |
| |\ |
|
| | * | clk: hisilicon: fix potential NULL dereference in hisi_clk_alloc() | Wei Yongjun | 2018-03-20 | 1 | -0/+2 |
| | * | clk: hisilicon: mark wdt_mux_p[] as const | Arnd Bergmann | 2018-03-16 | 1 | -1/+1 |
| | * | clk: hisilicon: Mark phase_ops static | Stephen Boyd | 2018-03-14 | 1 | -1/+1 |
| | * | clk: hi3798cv200: add emmc sample and drive clock | tianshuliang | 2018-03-12 | 1 | -0/+20 |
| | * | clk: hisilicon: add hisi phase clock support | tianshuliang | 2018-03-12 | 4 | -1/+165 |
| | * | clk: hi3798cv200: add COMBPHY0 clock support | Jianguo Sun | 2018-02-27 | 1 | -4/+11 |
| | * | clk: hi3798cv200: fix define indentation | Shawn Guo | 2018-02-27 | 1 | -24/+24 |
| | * | clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK | Shawn Guo | 2018-02-27 | 1 | -0/+2 |
| | * | clk: hi3798cv200: correct IR clock parent | Younian Wang | 2018-02-27 | 1 | -1/+1 |
| | * | clk: hi3798cv200: fix unregister call sequence in error path | Shawn Guo | 2018-02-27 | 1 | -7/+6 |
| * | | clk: hisilicon: hi3660：Fix potential NULL dereference in hi3660_stub_clk_pr... | Wei Yongjun | 2018-03-12 | 1 | -0/+2 |
| |/ |
|
| * | Merge branch 'clk-divider-container' into clk-next | Stephen Boyd | 2018-01-27 | 1 | -1/+1 |
| |\ |
|
| | * | clk: divider: fix incorrect usage of container_of | Jerome Brunet | 2017-12-29 | 1 | -1/+1 |
| * | | clk: hisilicon: Add support for Hi3660 stub clocks | Kaihua Zhong | 2017-12-07 | 3 | -0/+192 |
| |/ |
|
| * | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2017-11-18 | 6 | -10/+18 |
| |\ |
|
| | * | Merge branch 'clk-const' into clk-next | Stephen Boyd | 2017-11-14 | 3 | -4/+4 |
| | |\ |
|
| | | * | clk: hisilicon: make clk_ops const | Bhumika Goyal | 2017-11-02 | 3 | -4/+4 |
| | * | | clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' | Shawn Guo | 2017-11-14 | 1 | -1/+11 |
| | * | | clk: hisilicon: Delete an error message for a failed memory allocation in his... | Markus Elfring | 2017-11-14 | 1 | -3/+1 |
| | * | | clk: hi3660: fix incorrect uart3 clock freqency | Zhong Kaihua | 2017-11-14 | 1 | -1/+1 |
| | * | | clk: hi6220: mark clock cs_atb_syspll as critical | Leo Yan | 2017-11-01 | 1 | -1/+1 |
| | |/ |
|
| * / | License cleanup: add SPDX GPL-2.0 license identifier to files with no license | Greg Kroah-Hartman | 2017-11-02 | 1 | -0/+1 |
| |/ |
|
| * | clk: hi6220: change watchdog clock source | Leo Yan | 2017-09-01 | 1 | -3/+3 |
| * | clk: hisilicon: add usb2 clocks for hi3798cv200 SoC | Jiancheng Xue | 2017-06-21 | 1 | -0/+21 |
| * | clk: hi6220: add acpu clock | Zhangfei Gao | 2017-06-20 | 1 | -0/+22 |
| * | clk: hi3660: Set PPLL2 to 2880M | Zhong Kaihua | 2017-06-20 | 1 | -2/+2 |
| * | clk: hi3660: add clocks for video encoder, decoder and ISP | Chen Jun | 2017-06-20 | 1 | -0/+40 |
| * | clk: hi3660: fix wrong parent name of clk_mux_sysbus | Chen Jun | 2017-06-20 | 1 | -2/+4 |
| * | clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVER | Leo Yan | 2017-06-20 | 1 | -10/+38 |
| * | clk: hi3620: Fix a typo in one variable name | Markus Elfring | 2017-04-19 | 1 | -3/+3 |
| * | clk: hi3620: Delete error messages for a failed memory allocation in two func... | Markus Elfring | 2017-04-19 | 1 | -6/+2 |
