summaryrefslogtreecommitdiffstats
path: root/drivers/clk/imx/clk-imx7d.c
Commit message (Expand)AuthorAgeFilesLines
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159Thomas Gleixner2019-05-301-7/+1Star
* clk: imx: correct i.MX7D AV PLL num/denom offsetAnson Huang2019-04-301-2/+2
*-. Merge branches 'clk-of-refcount', 'clk-mmio-fixed-clock', 'clk-remove-clps', ...Stephen Boyd2019-03-081-0/+1
|\ \
| * | clk: imx7d: fix refcount leak in imx7d_clocks_init()Yangtao Li2018-12-281-0/+1
| |/
* / clk: imx7d: remove UART1 clock settingAnson Huang2018-11-061-3/+0Star
|/
* clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clkAnson Huang2018-10-171-1/+1
* clk: imx: imx7d: remove clks_init_on arrayAnson Huang2018-10-171-19/+8Star
* clk: imx: imx7d: remove unnecessary clocks from clks_init_on arrayAnson Huang2018-10-171-2/+1Star
* clk: imx7d: add IMX7D_MU_ROOT_CLKOleksij Rempel2018-07-091-0/+1
*-. Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and...Stephen Boyd2018-06-041-1/+3
|\ \
| * | clk: imx7d: reset parent for mipi csi rootRui Miguel Silva2018-06-011-0/+2
| * | clk: imx7d: fix mipi dphy div parentRui Miguel Silva2018-06-011-1/+1
| |/
* | clk: imx7d: correct enet clock CCGR registersAnson Huang2018-06-011-4/+6
* | clk: imx7d: correct enet phy ref clock gatesAnson Huang2018-06-011-2/+1Star
|/
* clk: imx7d: Move clks_init_on before any clock operationsDong Aisheng2018-04-061-7/+7
* clk: imx7d: Correct ahb clk parent selectAnson Huang2018-04-061-1/+1
* clk: imx7d: Correct dram pll typeAnson Huang2018-04-061-1/+3
* clk: imx7d: Add USB clock informationPeter Chen2018-04-061-1/+8
* Merge tag 'clk-imx-4.17-misc' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2018-03-141-40/+44
|\
| * clk: imx: imx7d: correct video pll clock treeAnson Huang2018-03-011-40/+44
* | clk: imx: imx7d: add the Keypad Port module clockStefan Agner2018-02-281-0/+1
* | clk: imx7d: add CAAM clockRui Miguel Silva2018-02-281-0/+1
* | clk: imx: imx7d: add the snvs clockAnson Huang2018-02-221-0/+1
|/
* clk: imx: imx7d: Remove ARM_M0 clockAdriana Reus2017-11-021-9/+0Star
* clk: imx: imx7d: Fix parent clock for OCRAM_CLKAdriana Reus2017-11-021-1/+1
* clk: imx: constify clk_div_tableArvind Yadav2017-08-311-2/+2
* clk: imx7d: create clocks behind rawnand clock gateStefan Agner2017-06-201-2/+4
* clk: imx7d: Fix the powerdown bit location of PLL DDRFabio Estevam2017-06-011-1/+1
* clk: imx7d: fix USDHC NAND clockStefan Agner2017-04-191-2/+1Star
* clk: imx7d: add the missing ipg_root_clkDong Aisheng2017-04-191-1/+2
* clk: clk-imx7d: fix ahb clk definitionDong Aisheng2017-04-191-3/+2Star
* clk: imx7d: Add the OCOTP clockFabio Estevam2017-01-211-0/+1
* clk: imx7d: Add PLL_AUDIO_TEST_DIV/POST_DIV clocksFabio Estevam2016-08-301-40/+61
* clk: imx7d: Add SAI IPG clocksFabio Estevam2016-08-191-3/+10
* clk: imx7d: Add the clock for SDMAFabio Estevam2016-08-191-0/+1
* clk: imx7d: do not set the parent of IMX7D_ENET_AXI_ROOT_SRCFabio Estevam2016-08-121-2/+0Star
* clk: imx7d: do not set parent of ethernet time/ref clocksStefan Agner2016-07-131-9/+0Star
* clk: imx7d: only enable minimum required clocksDong Aisheng2016-07-021-8/+10
* clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLEDong Aisheng2016-07-021-357/+357
* clk: imx: fix pll clock parentsDong Aisheng2016-06-121-6/+6
* clk: imx7d: correct dram pll typeAnson Huang2016-06-121-1/+1
* clk: imx7d: correct dram root clk parent selectAnson Huang2016-06-121-1/+1
* clk: imx7d: fix ahb clock mux 1Stefan Agner2016-05-031-1/+1
* clk: imx: add ckil clock for i.MX7Gary Bisson2016-04-061-1/+2
* clk: imx: Replace clk error check with imx_check_clocks()Bai Ping2015-12-021-4/+1Star
* clk: imx: Add a virtual arm clk on i.mx7dBai Ping2015-12-021-0/+6
* clk: imx7d: add ADC root clockHaibo Chen2015-10-091-0/+1
* clk: imx7d: retain early UART clocks during kernel initLucas Stach2015-09-261-0/+13
* ARM: imx: add imx7d clk tree supportFrank Li2015-06-031-0/+860
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-06-27 19:50:19 +0200