| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: ingenic: Handle setting the Low-Power Mode bit | Paul Cercueil | 2019-06-26 | 1 | -0/+3 |
| * | clk: ingenic/jz4725b: Fix "pll half" divider not read/written properly | Paul Cercueil | 2019-06-07 | 1 | -1/+8 |
| * | clk: ingenic/jz4725b: Fix incorrect dividers for main clocks | Paul Cercueil | 2019-06-07 | 1 | -5/+24 |
| * | clk: ingenic: jz4725b: Add UDC PHY clock | Paul Cercueil | 2019-04-11 | 1 | -0/+6 |
| * | clk: Add Ingenic jz4725b CGU driver | Paul Cercueil | 2018-10-17 | 1 | -0/+225 |
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index : openslx/kernel-qcow2-linux.git | |
| In-kernel qcow2 (Kernel part) | OpenSLX |
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