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path: root/drivers/clk/renesas/r8a77990-cpg-mssr.c
Commit message (Expand)AuthorAgeFilesLines
* clk: renesas: r8a77990: Add CMM clocksJacopo Mondi2019-06-181-0/+2
* clk: renesas: rcar-gen3: Rename DRIF clocksTakeshi Kihara2019-04-021-9/+9
* clk: renesas: rcar-gen3: Correct parent clock of Audio-DMACTakeshi Kihara2019-04-021-1/+1
* clk: renesas: rcar-gen3: Correct parent clock of HS-USBKazuya Mizuguchi2019-04-021-1/+1
* clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCIKazuya Mizuguchi2019-04-021-1/+1
* clk: renesas: r8a77990: Add Z2 clockTakeshi Kihara2019-04-021-0/+1
* clk: renesas: r8a77990: Correct parent clock of DUTakeshi Kihara2018-12-041-2/+2
* clk: renesas: r8a77990: Fix incorrect PLL0 divider in commentGeert Uytterhoeven2018-09-251-2/+2
* clk: renesas: r8a77990: Add missing I2C7 clockGeert Uytterhoeven2018-08-311-0/+1
* clk: renesas: r8a77990: Correct RCLK handlingGeert Uytterhoeven2018-08-271-2/+10
* clk: renesas: cpg-mssr: Add support for R-Car E3Yoshihiro Shimoda2018-05-091-0/+289