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path: root/drivers/clk/rockchip
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| | * clk: rockchip: check grf when waiting pll lockShawn Lin2016-02-151-0/+5
| | * clk: rockchip: disable alt_parent clk in err cases when registering cpuclkShawn Lin2016-02-151-2/+4
| * | Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/g...Michael Turquette2016-02-157-153/+157
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| | * clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner2016-02-045-98/+24Star
| | * clk: rockchip: add a factor clock typeHeiko Stuebner2016-02-042-0/+83
| | * clk: rockchip: fix parent of hclk_vcodec on rk3036Heiko Stuebner2016-02-041-1/+1
| | * clk: rockchip: free memory in error cases when registering clock branchesShawn Lin2016-02-021-2/+7
| | * clk: rockchip: Allow sclk_i2s0 and i2s0_frac to change their parents rate on ...Alexander Kochetkov2016-01-291-2/+2
| | * clk: rockchip: fix wrong mmc phase shift for rk3228Shawn Lin2016-01-281-3/+3
| | * clk: rockchip: add hclk_cpubus to the list of rk3188 critical clocksAlexander Kochetkov2016-01-261-0/+1
| | * clk: rockchip: add tsadc clock on rk3066Paweł Jarosz2016-01-261-1/+1
| | * clk: rockchip: fix usbphy-related clocksHeiko Stuebner2016-01-252-19/+8Star
| | * clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for i2s_2chzhangqing2016-01-251-1/+1
| | * clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8chzhangqing2016-01-251-1/+1
| | * clk: rockchip: rk3368: fix edp_24m parentzhangqing2016-01-251-1/+1
| | * clk: rockchip: rk3368: fix hdmi_cec gate-registerHeiko Stuebner2016-01-241-1/+1
| | * clk: rockchip: rk3368: fix parents of video encoder/decoderHeiko Stuebner2016-01-241-2/+2
| | * clk: rockchip: rk3368: fix cpuclk core dividersHeiko Stuebner2016-01-241-20/+20
| | * clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-clusterHeiko Stuebner2016-01-241-1/+1
| | * clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_busYakir Yang2016-01-241-1/+1
| * | Merge branch 'clk-fixes' into clk-nextStephen Boyd2016-01-302-26/+26
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* | | | Merge tag 'armsoc-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...Linus Torvalds2016-03-201-1/+3
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| * | | clk-divider: make sure read-only dividers do not write to their registerHeiko Stuebner2016-01-291-1/+3
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* | | clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036Heiko Stuebner2016-03-171-1/+1
* | | clk: rockchip: associate the rk3036 HCLK_EMAC clock-idXing Zheng2016-03-171-1/+1
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* | clk: rockchip: rk3368: fix some clock gatesJianqun xu2016-01-161-13/+13
* | clk: rockchip: rk3036: rename emac ext source clockXing Zheng2016-01-161-1/+1
* | clk: rockchip: rk3036: fix the div offset for emac clockXing Zheng2016-01-161-2/+2
* | clk: rockchip: rk3036: fix uarts clock errorXing Zheng2016-01-161-4/+4
* | clk: rockchip: rk3036: fix the FLAGs for clock muxXing Zheng2016-01-161-6/+6
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* Merge branch 'clk-rockchip' into clk-nextMichael Turquette2016-01-024-47/+116
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| * clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner2016-01-024-47/+116
* | Merge branch 'clk-rockchip' into clk-nextMichael Turquette2015-12-235-105/+235
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| * clk: rockchip: rk3036: include downstream muxes into fractional dividersXing Zheng2015-12-231-17/+17
| * clk: rockchip: Allow the RK3288 SPDIF clocks to change their parentSjoerd Simons2015-12-231-8/+8
| * clk: rockchip: include downstream muxes into fractional dividersHeiko Stuebner2015-12-232-72/+74
| * clk: rockchip: handle mux dependency of fractional dividersHeiko Stuebner2015-12-232-14/+142
* | clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner2015-12-217-8/+13
* | clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for aclk_vioYakir Yang2015-12-161-1/+1
* | clk: rockchip: use rk3288-efuse clock idsZhengShunQian2015-12-121-2/+2
* | clk: rockchip: add clock controller for rk3228Jeffy Chen2015-12-123-1/+689
* | clk: rockchip: allow more than 2 parents for cpuclkJeffy Chen2015-12-091-2/+2
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* clk: rockchip: fix rk3368 cpuclk divider offsetsHeiko Stuebner2015-12-031-2/+2
* clk: rockchip: protect rk3368 aclk_bus and aclk_peri clocksJianqun xu2015-12-021-0/+2
* clk: rockchip: Force rk3368 PWM clock (and its parents) onCaesar Wang2015-12-021-0/+5
* clk: rockchip: switch PLLs to slow mode before reboot for rk3288Chris Zhong2015-12-011-18/+14Star
* clk: rockchip: add mipidsi clock on rk3288Chris Zhong2015-11-261-1/+1
* clk: rockchip: add clock controller for rk3036Xing Zheng2015-11-233-1/+487
* clk: rockchip: add new pll-type for rk3036 and similar socsXing Zheng2015-11-232-1/+280
* clk: rockchip: set the id for crypto clkZain Wang2015-11-231-1/+1
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-19 12:02:05 +0200