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path: root/drivers/clk/samsung/clk-exynos7.c
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-5/+1Star
* clk: samsung: Add compile time PLL rate validatorsAndrzej Hajda2018-02-231-1/+1
* clk: samsung: exynos7: Fix PLL ratesAndrzej Hajda2018-02-231-1/+1
* clk: samsung: exynos7: Constify all clock initializersKrzysztof Kozlowski2016-06-021-57/+57
* clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clockAlim Akhtar2016-06-021-2/+3
* clk: samsung: Remove CLK_IS_ROOTStephen Boyd2016-03-031-7/+5Star
* clk: samsung: exynos7: Staticize file scope symbolsStephen Boyd2015-10-021-2/+2
* clk: samsung: exynos7: Add required clock tree for UFSAlim Akhtar2015-09-151-0/+107
* clk: samsung: exynos7: Add missing fixed_clks to cmu_infoAlim Akhtar2015-09-151-0/+2
* clk: samsung: exynos7: Correct CMU_FSYS1 clocks namesAlim Akhtar2015-09-151-6/+10
* clk: samsung: exynos7: Correct CMU_FSYS0 clocks namesAlim Akhtar2015-09-151-10/+14
* clk: samsung: exynos7: Correct CMU_PERIS clocks namesAlim Akhtar2015-09-151-2/+2
* clk: samsung: exynos7: Correct CMU_PERIC1 clocks namesAlim Akhtar2015-09-151-18/+20
* clk: samsung: exynos7: Correct CMU_PERIC0 clocks namesAlim Akhtar2015-09-151-4/+8
* clk: samsung: exynos7: Correct CMU_CCORE clocks namesAlim Akhtar2015-09-151-2/+2
* clk: samsung: exynos7: Correct CMU_TOP1 clocks namesAlim Akhtar2015-09-151-23/+27
* clk: samsung: exynos7: Correct CMU_TOP0 clocks namesAlim Akhtar2015-09-151-30/+37
* clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPCAlim Akhtar2015-09-151-0/+27
* clk: samsung: exynos7: Change the CMU_TOPC block clock namesAlim Akhtar2015-09-151-33/+37
* clk: samsung: exynos7: Correct nr_clk_ids for fsys1Alim Akhtar2015-09-151-1/+1
* clk: samsung: exynos7: Correct nr_clk_ids for fsys0Alim Akhtar2015-09-151-4/+4
* clk: samsung: exynos7: Fix CMU TOP1 blockAlim Akhtar2015-09-151-9/+15
* clk: samsung: exynos7: Fix CMU TOPC block clockAlim Akhtar2015-09-151-6/+6
* clk: samsung: Properly include clk.h and clkdev.hStephen Boyd2015-07-201-2/+0Star
* clk: samsung: exynos7: add clocks for audio blockPadmavathi Venna2015-01-151-2/+141
* clk: samsung: exynos7: add clocks for SPI blockPadmavathi Venna2015-01-151-0/+73
* clk: samsung: exynos7: add gate clock for DMA blockPadmavathi Venna2015-01-151-0/+4
* clk: samsung: exynos7: Add required clock tree for USBVivek Gautam2014-12-231-0/+64
* clk: samsung: exynos7: Add clocks for MSCL blockTony K Nadackal2014-12-231-0/+124
* clk: samsung: exynos7: add gate clock for ADC blockAbhilash Kesavan2014-10-311-0/+2
* clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocksNaveen Krishna Ch2014-10-311-0/+14
* clk: samsung: exynos7: add clocks for RTC blockNaveen Krishna Ch2014-10-311-0/+54
* clk: samsung: exynos7: add clocks for MMC blockNaveen Krishna Ch2014-10-311-0/+224
* clk: samsung: exynos7: add clocks for I2C blockNaveen Krishna Ch2014-10-311-0/+24
* clk: samsung: add initial clock support for Exynos7 SoCNaveen Krishna Ch2014-10-311-0/+425
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