openslx/kernel-qcow2-linux.git - In-kernel qcow2 (Kernel part)

	Commit message (Expand)	Author	Age	Files	Lines
*	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	Thomas Gleixner	2019-05-30	1	-12/+1
*	clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC	Dmitry Osipenko	2018-11-08	1	-0/+10
*	clk: tegra20: Turn EMC clock gate into divider	Dmitry Osipenko	2018-11-08	1	-10/+26
*	clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20	Dmitry Osipenko	2018-05-18	1	-1/+31
*	clk: tegra20: Correct parents of CDEV1/2 clocks	Dmitry Osipenko	2018-05-18	1	-4/+2
*	clk: tegra20: Add DEV1/DEV2 OSC dividers	Dmitry Osipenko	2018-05-18	1	-0/+14
*	clk: tegra: Specify VDE clock rate	Dmitry Osipenko	2018-03-12	1	-0/+1
*	clk: tegra20: Correct PLL_C_OUT1 setup	Dmitry Osipenko	2018-03-12	1	-3/+3
*	clk: tegra: Mark HCLK, SCLK and EMC as critical	Dmitry Osipenko	2018-03-12	1	-13/+10
*	clk: tegra: Bump SCLK clock rate to 216 MHz	Dmitry Osipenko	2017-11-01	1	-1/+1
*	clk: tegra: Use common definition of APBDMA clock gate	Dmitry Osipenko	2017-11-01	1	-5/+1
*	clk: tegra: Add AHB DMA clock entry	Dmitry Osipenko	2017-11-01	1	-0/+1
*	clk: tegra: Use tegra_clk_register_periph_data()	Thierry Reding	2017-10-19	1	-3/+1
*	treewide: Fix typos in printk	Masanari Iida	2016-04-28	1	-1/+1
*	clk: tegra: Remove CLK_IS_ROOT	Stephen Boyd	2016-03-03	1	-6/+4
*	clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate	Rhyland Klein	2015-11-20	1	-72/+78
*	clk: tegra: pll: Don't unconditionally set LOCK flags	Rhyland Klein	2015-11-20	1	-8/+10
*	clk: tegra: Constify pdiv-to-hw mappings	Thierry Reding	2015-11-20	1	-1/+1
*	clk: tegra: Format tables consistently	Thierry Reding	2015-11-18	1	-143/+134
*	clk: tegra: Miscellaneous coding style cleanups	Thierry Reding	2015-11-18	1	-3/+2
*	clk: tegra: Properly include clk.h	Stephen Boyd	2015-07-20	1	-1/+0
*	clk: tegra: Implement memory-controller clock	Thierry Reding	2014-11-26	1	-1/+7
*	clk: tegra: Add missing Tegra20 fuse clks	Peter De Schrijver	2014-02-17	1	-0/+2
*	clk: tegra: remove bogus PCIE_XCLK	Stephen Warren	2013-12-12	1	-6/+0
*	clk: tegra: implement a reset driver	Stephen Warren	2013-12-12	1	-1/+2
*	clk: tegra: add FUSE clock device	Alexandre Courbot	2013-11-26	1	-0/+1
*	clk: tegra: move tegra20 to common infra	Peter De Schrijver	2013-11-26	1	-402/+255
*	clk: tegra: move periph clocks to common file	Peter De Schrijver	2013-11-26	1	-2/+2
*	clk: tegra: move fields to tegra_clk_pll_params	Peter De Schrijver	2013-11-26	1	-17/+27
*	clk: tegra: common periph_clk_enb_refcnt and clks	Peter De Schrijver	2013-11-26	1	-27/+9
*	clk: tegra: simplify periph clock data	Peter De Schrijver	2013-11-26	1	-138/+82
*	clk: add CLK_SET_RATE_NO_REPARENT flag	James Hogan	2013-08-19	1	-2/+4
*	clk: tegra20: Fix incorrect placement of __initdata	Sachin Kamat	2013-08-09	1	-1/+1
*	clk: tegra: Use common of_clk_init function	Prashant Gaikwad	2013-05-31	1	-1/+2
*	clk: tegra: add ac97 controller clock	Lucas Stach	2013-05-21	1	-0/+8
*	clk: tegra: remove USB from clk init table	Lucas Stach	2013-05-21	1	-3/+0
*	Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/gi...	Linus Torvalds	2013-05-04	1	-85/+99
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\| *	clk: tegra: Add flags to tegra_clk_periph()	Peter De Schrijver	2013-04-05	1	-1/+1
\| *	clk: tegra: move from a lock bit idx to a lock mask	Peter De Schrijver	2013-04-05	1	-10/+10
\| *	clk: tegra: Add PLL post divider table	Peter De Schrijver	2013-04-05	1	-0/+7
\| *	clk: tegra: Refactor PLL programming code	Peter De Schrijver	2013-04-05	1	-72/+72
\| *	clk: tegra: defer application of init table	Stephen Warren	2013-04-05	1	-1/+6
\| *	clk: tegra: Fix cdev1 and cdev2 IDs	Prashant Gaikwad	2013-04-05	1	-1/+1
\| *	clk: tegra: Make gr2d and gr3d clocks children of pll_c	Thierry Reding	2013-04-05	1	-0/+2
\| *	Merge branch 'for-3.10/soc' into for-3.10/clk	Stephen Warren	2013-04-05	1	-34/+2
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* \| \	Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/g...	Linus Torvalds	2013-05-02	1	-34/+2
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\| * \ \	Merge tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel...	Arnd Bergmann	2013-04-09	1	-34/+2
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\| \| *	clk: tegra: No 7.1 super clk dividers on Tegra20	Peter De Schrijver	2013-03-11	1	-34/+2
* \| \|	clk: tegra: Allow PLLE training to succeed	Thierry Reding	2013-04-01	1	-1/+1
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* /	clk: Tegra: Remove duplicate smp_twd clock	Prashant Gaikwad	2013-03-05	1	-1/+0
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