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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-03-141-9/+9
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| *-. Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and ...Stephen Boyd2019-03-081-9/+9
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| | | * clk: tegra: dfll: Fix debugfs_simple_attr.cocci warningsYueHaibing2019-02-221-9/+9
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* | | clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' staticWei Yongjun2019-02-181-1/+1
* | | Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann2019-02-157-98/+913
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| * | clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210Peter De Schrijver2019-02-062-1/+6
| * | clk: tegra: dfll: add CVB tables for Tegra210Joseph Lo2019-02-062-0/+427
| * | clk: tegra: dfll: round down voltages based on alignmentJoseph Lo2019-02-061-8/+13
| * | clk: tegra: dfll: support PWM regulator controlJoseph Lo2019-02-061-67/+377
| * | clk: tegra: dfll: CVB calculation alignment with the regulatorJoseph Lo2019-02-064-14/+59
| * | clk: tegra: dfll: registration for multiple SoCsPeter De Schrijver2019-02-061-11/+34
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* / clk: tegra: dfll: Fix a potential Oop in remove()Dan Carpenter2019-01-091-1/+3
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*-. Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and '...Stephen Boyd2018-12-1410-32/+80
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| | * clk: tegra: Return the exact clock rate from clk_round_rateRobert Yang2018-12-141-3/+4
| | * clk: tegra30: Use Tegra CPU powergate helper functionJon Hunter2018-12-141-3/+3
| | * clk: tegra: Fix maximum audio sync clock for Tegra124/210Jon Hunter2018-12-147-13/+37
| | * clk: tegra: get rid of duplicate definesMarcel Ziswiler2018-12-141-3/+0Star
| | * clk: tegra20: Check whether direct PLLM sourcing is turned off for EMCDmitry Osipenko2018-11-081-0/+10
| | * clk: tegra20: Turn EMC clock gate into dividerDmitry Osipenko2018-11-081-10/+26
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* / clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macroYangtao Li2018-11-281-11/+1Star
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* clk: tegra210: Include size.h for compilation easeStephen Boyd2018-10-171-0/+1
* clk: tegra: Fixes for MBIST work aroundJoseph Lo2018-10-171-3/+3
* clk: tegra: probe deferral error reportingMarcel Ziswiler2018-10-171-2/+6
*-. Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',...Stephen Boyd2018-08-158-40/+343
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| | * clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocksPeter De-Schrijver2018-07-253-15/+12Star
| | * clk: tegra: Add sdmmc mux divider clockPeter De-Schrijver2018-07-253-0/+278
| | * clk: tegra: Refactor fractional divider calculationPeter De Schrijver2018-07-254-25/+52
| | * clk: tegra: Fix includes required by fence_udelay()Aapo Vienamo2018-07-251-0/+1
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*-----. \ Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-te...Stephen Boyd2018-08-154-7/+15
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| | | | * clk: tegra: emc: Avoid out-of-bounds bugDmitry Osipenko2018-07-091-1/+1
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| | | * clk: tegra: Mark Memory Controller clock as criticalDmitry Osipenko2018-07-091-2/+3
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| | * clk: tegra: Make vde a child of pll_c3Thierry Reding2018-07-091-1/+1
| | * clk: tegra: Make vic03 a child of pll_c3Thierry Reding2018-07-091-0/+1
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| * clk: tegra: bpmp: Don't crash when a clock fails to registerMikko Perttunen2018-07-091-3/+9
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* treewide: kzalloc() -> kcalloc()Kees Cook2018-06-131-3/+4
*-. Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and...Stephen Boyd2018-06-041-31/+11Star
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| | * clk: tegra: no need to check return value of debugfs_create functionsGreg Kroah-Hartman2018-06-021-31/+11Star
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* | clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20Dmitry Osipenko2018-05-187-8/+39
* | clk: tegra20: Correct parents of CDEV1/2 clocksDmitry Osipenko2018-05-181-4/+2Star
* | clk: tegra20: Add DEV1/DEV2 OSC dividersDmitry Osipenko2018-05-181-0/+14
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* clk: tegra: Fix pll_u rate configurationMarcel Ziswiler2018-03-121-0/+2
* clk: tegra: Specify VDE clock rateDmitry Osipenko2018-03-124-1/+4
* clk: tegra20: Correct PLL_C_OUT1 setupDmitry Osipenko2018-03-121-3/+3
* clk: tegra: Mark HCLK, SCLK and EMC as criticalDmitry Osipenko2018-03-128-36/+26Star
* clk: tegra: MBIST work around for Tegra210Peter De Schrijver2018-03-081-2/+342
* clk: tegra: add fence_delay for clock registersPeter De Schrijver2018-03-081-0/+7
* clk: tegra: Add la clock for Tegra210Peter De Schrijver2018-03-081-0/+14
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2017-11-1813-66/+102
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| * clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init()Nicolin Chen2017-11-011-2/+2
| * clk: tegra: dfll: Fix drvdata overwriting issueNicolin Chen2017-11-013-13/+11Star
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