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path: root/drivers/gpu/drm/i915/i915_irq.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915/icl: Correctly clear lost ctx-switch interrupts across reset for Gen11Oscar Mateo2018-04-251-3/+3
* drm/i915/psr: Control PSR interrupts via debugfsDhinakaran Pandiyan2018-04-201-39/+12Star
* drm/i915: Enable edp psr error interrupts on bdw+Ville Syrjälä2018-04-201-13/+44
* drm/i915: Enable edp psr error interrupts on hswDaniel Vetter2018-04-201-0/+34
* drm/i915: Pass the set of guilty engines to i915_reset()Chris Wilson2018-04-071-4/+8
* drm/i915/icl: Deal with GT INT DW correctlyOscar Mateo2018-04-061-37/+73
* drm/i915/icl: Handle RPS interrupts correctly for Gen11Oscar Mateo2018-04-061-11/+62
* drm/i915/icl: Use hw engine class, instance to find irq handlerMika Kuoppala2018-04-061-46/+53
* drm/i915: Use full serialisation around engine->irq_postedChris Wilson2018-03-221-4/+3Star
* drm/i915: Add control flags to i915_handle_error()Chris Wilson2018-03-201-23/+32
* drm/i915: Trim error mask to known enginesChris Wilson2018-03-191-0/+1
* drm/i915/guc: Move GuC notification handling to separate functionMichal Wajdeczko2018-03-091-31/+2Star
* drm/i915: Push irq_shift from gen8_cs_irq_handler() to callerChris Wilson2018-03-091-22/+16Star
* drm/i915: Handle pipe CRC around enabling/disabling pipe.Maarten Lankhorst2018-03-081-2/+2
* drm/i915: Assert that the request is indeed complete when signaled from irqChris Wilson2018-03-071-0/+1
* drm/i915/icl: Interrupt handlingMika Kuoppala2018-03-011-0/+235
* drm/i915: Rename drm_i915_gem_request to i915_requestChris Wilson2018-02-211-4/+4
* drm/i915: Prune gen8_gt_irq_handlerChris Wilson2018-02-191-30/+28Star
* drm/i915: Track GT interrupt handling using the master iirChris Wilson2018-02-191-20/+31
* drm/i915: Estimate and update missed vblanks.Dhinakaran Pandiyan2018-02-151-0/+12
* drm/i915: Remove spurious DRM_ERROR for cancelled interruptsChris Wilson2018-02-021-26/+9Star
* drm/i915/cnl: Add HPD support for Port F.Rodrigo Vivi2018-01-301-16/+19
* drm/i915/cnl: Add AUX-F supportRodrigo Vivi2018-01-301-0/+6
* drm/i915/guc: Grab RPM wakelock while disabling GuC interruptsSagar Arun Kamble2018-01-241-0/+6
* drm/i915/guc: Introduce USES_GUC_xxx helper macrosMichal Wajdeczko2017-12-061-1/+1
* drm/i915: Tidy up signed/unsigned comparisonChris Wilson2017-11-301-2/+2
* drm/i915: Update execlists tasklet namingSagar Arun Kamble2017-11-161-1/+1
* drm/i915/guc: Always enable the breadcrumbs irqChris Wilson2017-10-251-1/+5
* drm/i915: Filter out spurious execlists context-switch interruptsChris Wilson2017-10-241-2/+4
* drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "gt_pm"Sagar Arun Kamble2017-10-111-39/+48
* drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lockSagar Arun Kamble2017-10-111-2/+2
* drm/i915: Name i915_runtime_pm structure in dev_priv as "runtime_pm"Sagar Arun Kamble2017-10-111-4/+4
* drm/i915: Cleanup South Error InterruptsMika Kahola2017-10-101-8/+4Star
* drm/i915: Fold IRQ pipe masksMika Kahola2017-10-101-4/+3Star
* drm/i915/execlists: Preemption!Chris Wilson2017-10-041-4/+2Star
* drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are enabledImre Deak2017-10-021-0/+14
* drm/i915: Also discard second CRC on gen8+ platforms.Rodrigo Vivi2017-09-281-2/+2
* drm/i915: Enable scanline read based on frame timestampsUma Shankar2017-09-261-0/+54
* drm/i915: Don't rmw PIPESTAT enable bitsVille Syrjälä2017-09-251-79/+56Star
* drm/i915: Make own struct for execlist itemsMika Kuoppala2017-09-251-2/+3
* drm/i915: Rename global i915 to i915_modparamsMichal Wajdeczko2017-09-221-1/+1
* drm/i915: Check waiter->seqno carefully in case of preemptionChris Wilson2017-09-221-2/+5
* drm/i915: Only wake the waiter from the interrupt if passedChris Wilson2017-09-221-5/+10
* drm/i915/cnp: Display Wa #1179: WaHardHangonHotPlugRodrigo Vivi2017-09-201-1/+9
* drm/i915: Remove duplicated irq_preinstall/uninstall hooksVille Syrjälä2017-09-151-100/+17Star
* drm/i915: Clean up the HWSTAM messVille Syrjälä2017-09-151-7/+8
* drm/i915: Remove unused 'in_vbl' from i915_get_crtc_scanoutpos()Chris Wilson2017-09-151-3/+0Star
* drm/i915: Gen3 HWSTAM is actually 32 bitsVille Syrjälä2017-09-141-2/+2
* drm/i915: Rewrite GMCH irq handlers to avoid loopsVille Syrjälä2017-09-141-92/+51Star
* drm/i915: Extract PIPESTAT irq handling into separate functionsVille Syrjälä2017-09-141-122/+93Star
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