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path: root/drivers/gpu/drm/i915/intel_ddi.c
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* Revert "drm/i915: Track active streams also for DP SST"Ville Syrjälä2016-08-051-10/+0Star
* drm/i915: Fix iboost setting for SKL Y/U DP DDI buffer translation entry 2Ville Syrjälä2016-08-051-2/+2
* drm/i915: Track active streams also for DP SSTVille Syrjälä2016-08-041-0/+10
* drm/i915: Avoid mixing up SST and MST in DDI setupVille Syrjälä2016-08-041-18/+3Star
* drm/i915: Extract bdw_get_buf_trans_edp()Ville Syrjälä2016-08-021-7/+13
* drm/i915: Simplify intel_ddi_get_encoder_port()Ville Syrjälä2016-08-021-28/+8Star
* drm/i915: Get the iboost setting based on the port typeVille Syrjälä2016-08-021-4/+3Star
* drm/i915: Split DP/eDP/FDI and HDMI/DVI DDI buffer programming apartVille Syrjälä2016-08-021-29/+46
* drm/i915: Explicitly use ddi buf trans entry 9 for hdmiVille Syrjälä2016-08-021-2/+2
* drm/i915: Move bxt_ddi_vswing_sequence() call into intel_ddi_pre_enable() for...Ville Syrjälä2016-08-021-11/+4Star
* drm/i915: Program iboost settings for HDMI/DVI on SKLVille Syrjälä2016-08-021-11/+40
* drm/i915: Name the "iboost bit"Ville Syrjälä2016-08-021-1/+1
* drm/i915: Fix iboost setting for DDI with 4 lanes on SKLVille Syrjälä2016-08-021-13/+23
* drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/Ville Syrjälä2016-07-071-8/+8
* drm/i915: Kill has_dp_encoder from pipe_configVille Syrjälä2016-07-071-2/+1Star
* drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson2016-07-041-18/+18
* drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson2016-06-301-1/+4
* drm/i915/bxt: Sanitiy check the PHY lane power down statusImre Deak2016-06-131-0/+25
* drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function prefixesImre Deak2016-06-131-7/+6Star
* drm/i915/bxt: Set DDI PHY lane latency optimization during modesetImre Deak2016-06-131-43/+80
* drm/i915/bxt: Move DDI PHY enabling/disabling to the power well codeImre Deak2016-06-131-37/+9Star
* drm/i915/bxt: Wait for PHY1 GRC calibration synchronouslyImre Deak2016-06-131-12/+3Star
* drm/i915: Give encoders useful namesVille Syrjälä2016-05-301-1/+1
* drm/i915: Remove intel_clock_t typedefAnder Conselvan de Oliveira2016-05-131-1/+1
* drm/i915: Enable/disable TMDS output buffers in DP++ adaptor as neededVille Syrjälä2016-05-091-0/+12
* Revert "drm/i915: start adding dp mst audio"Lyude2016-05-031-19/+5Star
* drm/i915: Set crtc_state->lane_count for HDMIAnder Conselvan de Oliveira2016-04-291-1/+3
* drm/i915/bxt: Force reprogramming a PHY with invalid HW stateImre Deak2016-04-221-5/+14
* drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabledImre Deak2016-04-221-3/+18
* drm/i915/bxt: Use PHY0 GRC value for HW state verificationImre Deak2016-04-221-1/+1
* drm/i915: Fix eDP low vswing for BroadwellMika Kahola2016-04-201-2/+10
* drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resumeImre Deak2016-04-191-7/+3Star
* drm/i915/bxt: Add HW state verification for DDI PHY and CDCLKImre Deak2016-04-151-2/+122
* drm/i915/bxt: Don't reprogram an already enabled DDI PHYImre Deak2016-04-151-0/+40
* drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninitImre Deak2016-04-151-3/+4
* drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpersImre Deak2016-04-151-6/+4Star
* drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-onlyImre Deak2016-04-151-0/+3
* drm/i915/ddi: Silence compiler warning for unknown output typeChris Wilson2016-04-041-3/+3
* drm/i915: Disable FDI RX before DDI_BUF_CTLVille Syrjälä2016-04-011-6/+12
* drm/i915: use for_each_port_masked in bxt phy init for clarityJani Nikula2016-04-011-3/+7
* drm/i915: BXT DDI PHY sequence BUNVandana Kannan2016-04-011-2/+11
* drm/i915: move edp low vswing config to vbt dataJani Nikula2016-03-291-2/+2
* drm/i915: use a substruct in vbt data for edpJani Nikula2016-03-291-4/+4
* drm/i915/bxt: add dsi transcodersJani Nikula2016-03-211-0/+6
* drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll codeAnder Conselvan de Oliveira2016-03-091-21/+0Star
* drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interfaceAnder Conselvan de Oliveira2016-03-091-11/+7Star
* drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-140/+1Star
* drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-300/+1Star
* drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-260/+11Star
* drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira2016-03-091-1/+3
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