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path: root/drivers/gpu/drm/i915/intel_dpll_mgr.c
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* drm/i915: Convert dev_priv->dev backpointers to dev_priv->drmChris Wilson2016-07-051-1/+1
* drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson2016-07-041-6/+6
* drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson2016-06-301-1/+5
* drm/i915/bxt: Avoid early timeout during PLL enableImre Deak2016-06-281-2/+2
* drm/i915: Use crtc->name in debug messagesVille Syrjälä2016-05-301-8/+8
* drm/i915: Fix NULL pointer deference when out of PLLs in IVBAnder Conselvan de Oliveira2016-05-261-0/+3
* drm/i915: Unify SKL cdclk init pathsVille Syrjälä2016-05-231-9/+2Star
* drm/i915: Keep track of preferred cdclk vco frequency on SKLVille Syrjälä2016-05-231-0/+5
* drm/i915: Actually read out DPLL0 vco on skl from hardwareVille Syrjälä2016-05-231-6/+0Star
* drm/i915: Move the SKL DPLL0 VCO computation into intel_dp_compute_config()Ville Syrjälä2016-05-231-4/+0Star
* drm/i915/skl: SKL CDCLK change on modeset tracking VCOClint Taylor2016-05-231-4/+5
* drm/i915: Remove intel_clock_t typedefAnder Conselvan de Oliveira2016-05-131-1/+1
* drm/i915: s/DPPL/DPLL/ for SKL DPLLsVille Syrjälä2016-05-121-3/+3
* drm/i915/bxt: PORT_PLL_REF_SEL bit should be set for all BXT variationsDongwon Kim2016-04-151-10/+2Star
* drm/i915/bxt: Don't toggle power well 1 on-demandImre Deak2016-04-151-4/+1Star
* drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpersImre Deak2016-04-151-2/+2
* drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bitDongwon Kim2016-04-111-1/+9
* drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen2016-04-071-1/+1
* drm/i915: Add locking to pll updates, v3.Maarten Lankhorst2016-03-311-6/+19
* drm/i915: fix sparse warning for using false as NULLJani Nikula2016-03-171-1/+1
* drm/i915: Move pll power state to crtc power domains.Maarten Lankhorst2016-03-171-4/+0Star
* drm/i915: Perform dpll commit first, v2.Maarten Lankhorst2016-03-171-1/+1
* drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.Maarten Lankhorst2016-03-171-16/+19
* drm/i915/bxt: Fix off-by-one error in Broxton PLL IDsImre Deak2016-03-161-4/+4
* drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll codeAnder Conselvan de Oliveira2016-03-091-27/+97
* drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interfaceAnder Conselvan de Oliveira2016-03-091-18/+72
* drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-6/+133
* drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-2/+305
* drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-12/+283
* drm/i915: Refactor platform specifics out of intel_get_shared_dpll()Ander Conselvan de Oliveira2016-03-091-84/+142
* drm/i915: Use a table to initilize shared dpllsAnder Conselvan de Oliveira2016-03-091-103/+86Star
* drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira2016-03-091-11/+40
* drm/i915: Split intel_get_shared_dpll() into smaller functionsAnder Conselvan de Oliveira2016-03-091-35/+74
* drm/i915: Move ddi shared dpll code to intel_dpll_mgr.cAnder Conselvan de Oliveira2016-03-091-0/+472
* drm/i915: Move shared dpll code to a new fileAnder Conselvan de Oliveira2016-03-091-0/+368