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path: root/drivers/gpu/drm/i915/intel_fifo_underrun.c
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* drm/i915: move modesetting core code under display/Jani Nikula2019-06-171-458/+0Star
* drm/i915: extract intel_fifo_underrun.h from intel_drv.hJani Nikula2019-04-301-0/+1
* drm/i915: extract intel_fbc.h from intel_drv.hJani Nikula2019-04-081-0/+1
* drm/i915: Rename HAS_GMCHRodrigo Vivi2019-02-051-3/+3
* drm/i915: small isolated c99 types to kernel types switchJani Nikula2019-01-171-6/+6
* drm/i915: merge gen checks to use rangeLucas De Marchi2018-12-131-1/+1
* drm/i915: replace IS_GEN<N> with IS_GEN(..., N)Lucas De Marchi2018-12-131-3/+3
* drm/i915: Don't rmw PIPESTAT enable bitsVille Syrjälä2017-09-251-6/+8
* drm/i915: Fix enum pipe vs. enum transcoder for the PCH transcoderVille Syrjälä2017-09-011-10/+10
* drm/i915: Consistently use enum pipe for PCH transcodersMatthias Kaehlcke2017-07-181-3/+3
* drm/i915/cnl: Enable fifo underrun for Cannonlake.Rodrigo Vivi2017-06-121-1/+1
* drm/i915: Add FIFO underrun tracepointsVille Syrjälä2017-03-031-2/+9
* drm/i915: s/assert_spin_locked/lockdep_assert_held/Chris Wilson2017-03-021-7/+7
* drm/i915: Always use intel_get_crtc_for_pipe()Ville Syrjälä2016-11-011-5/+6
* drm/i915: Store struct intel_crtc * in {pipe,plane}_to_crtc_mapping[]Ville Syrjälä2016-11-011-12/+10Star
* drm/i915: Make IS_GEN macros only take dev_privTvrtko Ursulin2016-10-141-3/+3
* drm/i915: Make HAS_GMCH_DISPLAY only take dev_privTvrtko Ursulin2016-10-141-1/+1
* drm/i915/fbc: disable FBC on FIFO underrunsPaulo Zanoni2016-09-221-0/+2
* drm/i915: Convert dev_priv->dev backpointers to dev_priv->drmChris Wilson2016-07-051-5/+7
* drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson2016-07-041-9/+9
* drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen2016-04-071-2/+2
* drm/i915: make transcoder_name return a stringJani Nikula2016-03-161-3/+3
* drm/i915: Introduce bdw_{update,enable,disable}_pipe_irq()Ville Syrjälä2015-11-261-6/+2Star
* drm/i915: Make ironlake_{enable,disable}_display_irq() static inlinesVille Syrjälä2015-11-261-4/+4
* drm/i915: Type safe register read/writeVille Syrjälä2015-11-181-2/+2
* drm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPTVille Syrjälä2015-11-101-27/+98
* drm/i915: Check for driver readyness before handling an underrun interruptChris Wilson2015-03-041-11/+7Star
* drivers: gpu: drm: i915: intel_fifo_underrun.c: Fix a typo in commentKumar Amit Mehta2015-01-271-1/+1
* drm/i915: kerneldoc for intel_fifo_underrun.cDaniel Vetter2014-10-241-17/+65
* drm/i915: Filter gmch fifo underruns in the shared handlerDaniel Vetter2014-10-241-2/+8
* drm/i915: Add wrappers to handle fifo underrun interruptsDaniel Vetter2014-10-241-0/+17
* drm/i915: Use dev_priv in public intel_fifo_underrun.c functionsDaniel Vetter2014-10-241-13/+12Star
* drm/i915: Extract intel_fifo_underrun.cDaniel Vetter2014-10-241-0/+311
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