summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_lrc.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915/execlists: Wait for ELSP submission on restartChris Wilson2018-05-251-1/+10
* drm/i915: Flush the ring stop bit after clearing RING_HEAD in resetChris Wilson2018-05-251-0/+22
* drm/i915/execlists: Handle copying default context state for atomic resetChris Wilson2018-05-191-11/+4Star
* drm/i915: Pull the context->pin_count dec into the common intel_context_unpinChris Wilson2018-05-181-12/+1Star
* drm/i915: Store a pointer to intel_context in i915_requestChris Wilson2018-05-181-54/+71
* drm/i915: Move request->ctx asideChris Wilson2018-05-181-14/+17
* drm/i915/execlists: HWACK checking superseded checking port[0].countChris Wilson2018-05-171-2/+0Star
* drm/i915: Stop parking the signaler around resetChris Wilson2018-05-161-0/+6
* drm/i915/execlists: Flush pending preemption events during resetChris Wilson2018-05-161-1/+35
* drm/i915/execlists: Split out CSB processingChris Wilson2018-05-161-39/+52
* drm/i915: Split execlists/guc reset preparationsChris Wilson2018-05-161-10/+2Star
* drm/i915: Move engine reset prepare/finish to backendsChris Wilson2018-05-161-3/+44
* drm/i915/execlists: Refactor out complete_preempt_context()Chris Wilson2018-05-161-10/+13
* drm/i915/execlists: Use rmb() to order CSB readsChris Wilson2018-05-111-0/+1
* drm/i915/icl: Introduce initial Icelake WorkaroundsOscar Mateo2018-05-111-0/+2
* drm/i915/execlists: Make submission tasklet hardirq safeChris Wilson2018-05-091-13/+29
* drm/i915: don't leak the pin_map on errorMatthew Auld2018-05-081-4/+6
* drm/i915/execlists: Cache the priolist when reschedulingChris Wilson2018-05-081-3/+10
* drm/i915/execlists: Drop unused parameter to lookup_priolist()Chris Wilson2018-05-081-5/+3Star
* drm/i915/execlists: Drop preemption arbitrations points along the ringChris Wilson2018-05-041-3/+6
* drm/i915/execlists: Emit i915_trace_request_out for preemptionChris Wilson2018-05-031-10/+9Star
* drm/i915: Split i915_gem_timeline into individual timelinesChris Wilson2018-05-031-20/+28
* drm/i915: Move timeline from GTT to ringChris Wilson2018-05-031-1/+1
* Merge drm/drm-next into drm-intel-next-queuedJani Nikula2018-05-021-0/+1
|\
| * drm/i915/execlists: Clear user-active flag on preemption completionChris Wilson2018-04-041-0/+9
| * drm/i915/execlists: Use a locked clear_bit() for synchronisation with interruptChris Wilson2018-03-271-13/+8Star
* | drm/i915/execlists: Don't trigger preemption if completeChris Wilson2018-05-011-1/+2
* | drm/i915: Wrap engine->context_pin() and engine->context_unpin()Chris Wilson2018-04-301-12/+17
* | drm/i915/lrc: Scrub the GPU state of the guilty hanging requestChris Wilson2018-04-301-7/+17
* | drm/i915/icl: Correctly clear lost ctx-switch interrupts across reset for Gen11Oscar Mateo2018-04-251-18/+42
* | drm/i915: Pack params to engine->schedule() into a structChris Wilson2018-04-181-9/+11
* | drm/i915: Rename priotree to schedChris Wilson2018-04-181-38/+39
* | drm/i915: Check whitelist registers across resetsChris Wilson2018-04-141-6/+2Star
* | drm/i915: Split out functions for different kinds of workaroundsOscar Mateo2018-04-111-3/+11
* | drm/i915: Move a bunch of workaround-related code to its own fileOscar Mateo2018-04-111-0/+1
* | drm/i915/execlists: Set queue priority from secondary portChris Wilson2018-04-111-1/+20
* | drm/i915/execlists: Log fence context & seqno throughout GEM_TRACETvrtko Ursulin2018-04-091-5/+17
* | drm/i915/selftests: Add basic sanitychecks for execlistsChris Wilson2018-04-041-0/+4
* | drm/i915: Store preemption capability in engine->flagsChris Wilson2018-04-041-2/+5
* | drm/i915/execlists: Track begin/end of execlists submission sequencesChris Wilson2018-04-031-11/+39
* | drm/i915: Include the HW breadcrumb whenever we trace the global_seqnoChris Wilson2018-03-291-2/+4
* | drm/i915/execlists: Reset ring registers on rebinding contextsChris Wilson2018-03-281-0/+1
* | drm/i915/execlists: Avoid kicking the submission too early for reschedulingChris Wilson2018-03-271-5/+12
* | drm/i915/execlists: Clear user-active flag on preemption completionChris Wilson2018-03-271-0/+9
* | drm/i915: Actually flush interrupts on reset not just wedgingChris Wilson2018-03-231-54/+53Star
* | drm/i915: Flush pending interrupt following a GPU resetChris Wilson2018-03-221-3/+4
* | drm/i915/execlists: Use a locked clear_bit() for synchronisation with interruptChris Wilson2018-03-211-13/+8Star
* | drm/i915: move gen8 irq shifts to intel_lrc.cDaniele Ceraolo Spurio2018-03-151-1/+14
* | drm/i915: use engine->irq_keep_mask when resetting irqsDaniele Ceraolo Spurio2018-03-151-2/+6
|/
* drm/i915: add schedule out notification of preempted but completed requestWeinan Li2018-03-081-1/+6
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-21 14:34:39 +0200