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path: root/drivers/gpu/drm/i915/intel_pm.c
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* drm/i915: Update Promotion timer for RC6 TO ModeSagar Arun Kamble2015-10-061-4/+6
* drm/i915: Calculate watermark configuration during atomic check (v2)Matt Roper2015-09-301-52/+12Star
* drm/i915: Calculate ILK-style watermarks during atomic check (v3)Matt Roper2015-09-301-45/+43Star
* drm/i915: Calculate pipe watermarks into CRTC state (v3)Matt Roper2015-09-301-17/+27
* drm/i915: Refactor ilk_update_wm (v3)Ville Syrjälä2015-09-301-29/+35
* drm/i915: Drop intel_update_sprite_watermarksMatt Roper2015-09-301-58/+0Star
* drm/i915/ivb: Move WaCxSRDisabledForSpriteScaling w/a to atomic checkMatt Roper2015-09-301-23/+12Star
* drm/i915/skl: Eliminate usage of pipe_wm_parameters from SKL-style WM (v3)Matt Roper2015-09-301-175/+151Star
* drm/i915/skl: Simplify wm structures slightly (v2)Matt Roper2015-09-301-45/+48
* drm/i915: Eliminate usage of pipe_wm_parameters from ILK-style WM (v2)Matt Roper2015-09-301-55/+29Star
* drm/i915: Eliminate usage of plane_wm_parameters from ILK-style WM code (v2)Matt Roper2015-09-301-63/+70
* drm/i915: s/_TRANSA_CHICKEN/TRANS_CHICKEN(PIPE_A)/Ville Syrjälä2015-09-301-2/+2
* drm/i915: Read czclk from CCK on vlv/chvVille Syrjälä2015-09-301-20/+5Star
* drm/i915/skl: Remove WaDisableVFUnitClockGatingArun Siluvery2015-09-301-6/+0Star
* drm/i915/skl: Remove WaSetGAPSunitClckGateDisableArun Siluvery2015-09-301-6/+0Star
* drm/i915/skl: Remove WaDisableSDEUnitClockGatingArun Siluvery2015-09-301-3/+1Star
* drm/i915/bxt: Add WaStoreMultiplePTEenable nameArun Siluvery2015-09-301-6/+3Star
* drm/i915: Constify adjusted_modeVille Syrjälä2015-09-301-6/+3Star
* drm/i915: Always call the adjusted mode 'adjusted_mode'Ville Syrjälä2015-09-301-8/+6Star
* Merge remote-tracking branch 'airlied/drm-next' into drm-intel-nextDaniel Vetter2015-09-301-13/+29
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| * drm/i915: Don't try to use DDR DVFS on CHV when disabled in the BIOSVille Syrjälä2015-09-101-13/+29
* | drm/i915: Replace raw numbers with the approproate register name in ILK turbo...Ville Syrjälä2015-09-231-3/+3
* | drm/i915: Parametrize ILK turbo registersVille Syrjälä2015-09-231-7/+7
* | drm/i915: Program GuC MAX IDLE CountSagar Arun Kamble2015-09-231-0/+4
* | drm/i915: WaRsDoubleRc6WrlWithCoarsePowerGatingSagar Arun Kamble2015-09-231-1/+7
* | drm/i915: WaRsUseTimeoutModeSagar Arun Kamble2015-09-231-3/+10
* | drm/i915: WaRsDisableCoarsePowerGatingSagar Arun Kamble2015-09-231-4/+7
* | drm/i915/bxt: WaGsvDisableTurboSagar Arun Kamble2015-09-231-0/+10
* | drm/i915/skl: Don't clear all watermarks when updating. (v2)Bob Paauwe2015-09-221-1/+25
* | drm/i915/bxt: Add WaSetClckGatingDisableMediaArun Siluvery2015-09-141-0/+6
* | drm/i915/bxt: Clean up bxt_init_clock_gatingNick Hoath2015-09-071-5/+11
* | drm/i915: use the yesno helper for loggingJani Nikula2015-09-041-2/+2
* | drm/i915/skl: Avoid using un-initialized bits_per_pixelKumar, Mahesh2015-09-041-1/+2
* | drm/i915: Add HAS_PCH_LPT_LP() macroVille Syrjälä2015-09-021-2/+2
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* Merge tag 'topic/drm-misc-2015-07-28' into drm-intel-next-queuedDaniel Vetter2015-08-061-1/+1
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| * drm: Simplify drm_for_each_legacy_plane argumentsDaniel Vetter2015-07-221-1/+1
* | drm/i915:skl: Add WaEnableGapsTsvCreditFixArun Siluvery2015-08-051-0/+6
* | Partially revert "drm/i915: s/mdelay/msleep/" in ilk rps codeDaniel Vetter2015-07-201-3/+3
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* drm/i915: Fix divide by zero on watermark updateMika Kuoppala2015-07-171-1/+3
* drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaroundArun Siluvery2015-07-151-0/+3
* drm/i915/gen9: Implement WaDisableKillLogic for gen 9Nick Hoath2015-07-151-0/+4
* drm/i915: Add HAS_CORE_RING_FREQ macroAkash Goel2015-07-141-1/+1
* drm/i915/skl: Restrict the ring frequency table programming to SKLAkash Goel2015-07-141-1/+2
* drm/i915: Update PM interrupts before updating the freqDeepak S2015-07-131-2/+2
* drm/i915/skl: Ring frequency table programming changesAkash Goel2015-07-131-4/+19
* drm/i915/skl: Retrieve the Rpe value from PcodeAkash Goel2015-07-131-8/+11
* drm/i915: use dev_priv for the FBC functionsPaulo Zanoni2015-07-081-1/+3
* drm/i915: s/mdelay/msleep/Daniel Vetter2015-07-071-3/+3
* drm/i915: Zero unused WM1 watermarks on VLV/CHVVille Syrjälä2015-06-291-0/+6
* drm/i915: Don't do PM5/DDR DVFS with multiple pipesVille Syrjälä2015-06-291-0/+3
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