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path: root/drivers/gpu/drm/i915/intel_psr.c
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* drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen2016-04-071-1/+1
* Revert "drm/i915: Enable PSR by default on Valleyview and Cherryview."Ville Syrjälä2016-03-101-2/+1Star
* drm/i915: Add wait_for_usTvrtko Ursulin2016-03-031-1/+2
* drm/i915: Enable PSR by default on Haswell and Broadwell.Rodrigo Vivi2016-02-171-1/+2
* drm/i915: Enable PSR by default on Valleyview and Cherryview.Rodrigo Vivi2016-02-171-1/+4
* drm/i915: Change i915.enable_psr parameter to use per platform default.Rodrigo Vivi2016-02-171-0/+5
* drm/i915: Instrument PSR parameter for debuging with link standby x link off.Rodrigo Vivi2016-02-011-0/+17
* drm/i915: Add PSR main link standby support backRodrigo Vivi2016-02-011-7/+19
* drm/i915: PSR simplify port and link standby checks.Rodrigo Vivi2016-02-011-3/+10
* drm/i915: PSR also doesn't have link_entry_time on SKL.Rodrigo Vivi2015-12-121-2/+3
* drm/i915: Separate cherryview from valleyviewWayne Boyer2015-12-101-3/+3
* drm/i915: Fix idle_frames counter.Rodrigo Vivi2015-12-071-13/+7Star
* drm/i915: Also disable PSR on Sink when disabling it on Source.Rodrigo Vivi2015-11-241-0/+4
* drm/i915: PSR: Mask LPSP hw tracking back again.Rodrigo Vivi2015-11-241-2/+7
* drm/i915: PSR: Let's rely more on frontbuffer tracking.Rodrigo Vivi2015-11-241-19/+3Star
* drm/i915: Remove duplicated dpcd write on hsw_psr_enable_sink.Rodrigo Vivi2015-11-241-3/+0Star
* drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT.Rodrigo Vivi2015-11-181-4/+0Star
* drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT.Rodrigo Vivi2015-11-181-1/+0Star
* drm/i915: Reduce PSR re-activation time for VLV/CHV.Rodrigo Vivi2015-11-181-2/+1Star
* drm/i915: Delay first PSR activation.Rodrigo Vivi2015-11-181-2/+16
* drm/i915: Type safe register read/writeVille Syrjälä2015-11-181-6/+6
* drm/i915: Model PSR AUX register selection more like the normal AUX codeVille Syrjälä2015-11-161-6/+21
* drm/i915: Add dev_priv->psr_mmio_baseVille Syrjälä2015-11-161-12/+15
* drm/i915: Parametrize AUX registersVille Syrjälä2015-11-161-2/+3
* drm/i915: Parametrize HSW video DIP data registersVille Syrjälä2015-10-131-8/+10
* drm/i915: VLV/CHV PSR: Increase wait delay time before active PSR.Rodrigo Vivi2015-08-051-1/+2
* drm/i915: PSR: Increase idle_framesRodrigo Vivi2015-07-091-2/+5
* drm/i915: PSR: Remove Low Power HW tracking mask.Rodrigo Vivi2015-07-091-1/+1
* drm/i915: PSR: Flush means invalidate + flushRodrigo Vivi2015-07-091-19/+21
* drm/i915/psr: Restrict single-shot updates to the PSR pipeDaniel Vetter2015-06-241-9/+13
* drm/i915/psr: Restrict buffer tracking to the PSR pipeDaniel Vetter2015-06-241-4/+7
* drm/i915: PSR VLV: Add single frame update.Rodrigo Vivi2015-04-141-0/+42
* drm/i915: PSR: deprecate link_standby support for core platforms.Rodrigo Vivi2015-04-141-16/+10Star
* drm/i915: PSR: Fix DP_PSR_NO_TRAIN_ON_EXIT logicRodrigo Vivi2015-04-141-4/+9
* drm/i915: PSR: Remove wrong LINK_DISABLE.Rodrigo Vivi2015-04-141-2/+1Star
* drm/i915/skl: Enabling PSR2 SU with frame syncSonika Jindal2015-04-071-1/+37
* drm/i915: PSR: Keep sink state consistent with sourceDurgadoss R2015-03-301-1/+1
* drm/i915: Remove duplicated psr.active unsetRodrigo Vivi2015-03-261-2/+0Star
* drm/i915/skl: Enabling PSR on SkylakeSonika Jindal2015-01-281-2/+24
* drm/i915: Make intel_crtc->config a pointerAnder Conselvan de Oliveira2015-01-271-4/+4
* drm/i915: Embedded struct drm_crtc_state in intel_crtc_stateAnder Conselvan de Oliveira2015-01-271-1/+1
* drm/i915: group link_standby setup and let this info visible everywhere.Rodrigo Vivi2015-01-151-10/+9Star
* drm/i915: Add missing vbt check.Rodrigo Vivi2015-01-151-1/+1
* drm/i915: PSR HSW/BDW: Fix inverted logic at sink main_link_active bit.Rodrigo Vivi2015-01-151-2/+2
* drm/i915: PSR VLV/CHV: Remove condition checks that only applies to Haswell.Rodrigo Vivi2015-01-151-8/+5Star
* drm/i915: VLV/CHV PSR needs to exit PSR on every flush.Rodrigo Vivi2015-01-151-4/+2Star
* drm/i915: VLV/CHV PSR Software timer modeRodrigo Vivi2014-12-031-13/+84
* drm/i915: PSR VLV/CHV: Introduce setup, enable and disable functionsRodrigo Vivi2014-12-031-25/+130
* drm/i915: Remove intel_psr_is_enabled function.Rodrigo Vivi2014-12-031-10/+0Star
* drm/i915: remove PSR BDW single frame update.Rodrigo Vivi2014-12-031-1/+0Star
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