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path: root/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1Star
* drm/mediatek: add a error return value when clock driver has been preparedBibby Hsieh2018-10-031-1/+1
* drm/mediatek: add the DSI1 for component init conditionstu.hsieh@mediatek.com2018-06-241-0/+1
* drm/mediatek: add component DSI3stu.hsieh@mediatek.com2018-06-241-0/+2
* drm/mediatek: add component DSI2stu.hsieh@mediatek.com2018-06-241-0/+2
* drm/mediatek: add component DPI1stu.hsieh@mediatek.com2018-06-241-0/+2
* drm/mediatek: add ddp component PWM2stu.hsieh@mediatek.com2018-06-241-0/+1
* drm/mediatek: add ddp component PWM1stu.hsieh@mediatek.com2018-06-241-0/+1
* drm/mediatek: add ddp component OD1stu.hsieh@mediatek.com2018-06-241-1/+2
* drm/mediatek: add ddp component AAL1stu.hsieh@mediatek.com2018-06-241-1/+2
* drm: Convert to using %pOF instead of full_nameRob Herring2017-07-261-4/+2Star
* drm/mediatek: separate color module to fixup error memory reallocationyt.shen@mediatek.com2017-06-271-78/+2Star
* drm/mediatek: add support for Mediatek SoC MT2701yt.shen@mediatek.com2017-04-071-0/+7
* drm/mediatek: add BLS componentyt.shen@mediatek.com2017-04-071-1/+4
* drm/mediatek: add *driver_data for different hardware settingsyt.shen@mediatek.com2017-04-071-8/+49
* drm/mediatek: fix a typo of DISP_OD_CFG to OD_RELAYMODEBibby Hsieh2016-11-241-1/+1
* Revert "drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODE"Dave Airlie2016-11-181-1/+1
* drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODEBibby Hsieh2016-10-191-1/+1
* drm/mediatek: set mt8173 dithering functionBibby Hsieh2016-08-111-12/+60
* drm/mediatek: Add gamma correction.Bibby Hsieh2016-08-111-0/+31
* drm/mediatek: Add GAMMA engine basic functionBibby Hsieh2016-08-111-1/+28
* drm/mediatek: Add AAL engine basic functionBibby Hsieh2016-08-111-1/+28
* drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.CK Hu2016-05-061-0/+225
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