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path: root/drivers/misc/cxl/pci.c
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* cxl: Report the tunneled operations statusPhilippe Bergheaud2018-05-151-1/+6
* cxl: Set the PBCQ Tunnel BAR register when enabling capi modePhilippe Bergheaud2018-05-151-0/+7
* cxl: Fix timebase synchronization status on P9Christophe Lombard2018-03-141-17/+0Star
* cxl: read PHB indications from the device treePhilippe Bergheaud2018-03-131-5/+43
* cxl: Check if PSL data-cache is available before issue flush requestVaibhav Jain2018-03-131-6/+13
* cxl: Remove function write_timebase_ctrl_psl9() for PSL9Vaibhav Jain2018-03-131-8/+2Star
* cxl: Enable NORST bit in PSL_DEBUG register for PSL9Vaibhav Jain2018-03-131-2/+6
* cxl: Remove support for "Processing accelerators" classFrederic Barrat2018-01-241-2/+0Star
* cxl: Check if vphb exists before iterating over AFU devicesVaibhav Jain2017-11-231-2/+10
* cxl: Rework the implementation of cxl_stop_trace_psl9()Vaibhav Jain2017-11-061-0/+38
* cxl: Dump PSL_FIR register on PSL9 error irqVaibhav Jain2017-10-131-1/+2
* cxl: Add support for POWER9 DD2Christophe Lombard2017-10-061-23/+24
* mm: treewide: remove GFP_TEMPORARY allocation flagMichal Hocko2017-09-141-1/+1
* cxl: Export library to support IBM XSLChristophe Lombard2017-07-031-14/+27
* cxl: Fixes for Coherent Accelerator Interface Architecture 2.0Christophe Lombard2017-06-231-7/+4Star
* Merge tag 'powerpc-4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds2017-05-051-58/+351
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| * cxl: Route eeh events to all drivers in cxl_pci_error_detected()Vaibhav Jain2017-05-021-6/+9
| * cxl: Force context lock during EEH flowVaibhav Jain2017-05-021-2/+17
| * cxl: Enable PCI device IDs for future IBM CXL adaptersMatthew R. Ochs2017-04-191-0/+2
| * cxl: Add psl9 specific codeChristophe Lombard2017-04-131-17/+242
| * cxl: Isolate few psl8 specific callsChristophe Lombard2017-04-131-21/+43
| * cxl: Rename some psl8 specific functionsChristophe Lombard2017-04-131-30/+30
| * cxl: Update implementation service layerChristophe Lombard2017-04-131-15/+40
| * cxl: Read vsec perst load imageChristophe Lombard2017-04-131-0/+1
* | cxl: Route eeh events to all slices for pci_channel_io_perm_failure stateVaibhav Jain2017-03-201-7/+6Star
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* cxl: fix nested locking hang during EEH hotplugAndrew Donnellan2017-02-211-2/+9
* cxl: Prevent read/write to AFU config space while AFU not configuredAndrew Donnellan2017-01-251-0/+2
* cxl: Force psl data-cache flush during device shutdownVaibhav Jain2017-01-251-0/+3
* cxl: Fix error handling in _cxl_pci_associate_default_context()Christophe Jaillet2016-11-181-1/+1
* cxl: Prevent adapter reset if an active context existsVaibhav Jain2016-10-191-0/+2
* cxl: Flush PSL cache before resetting the adapterFrederic Barrat2016-10-041-0/+3
* cxl: Fix informational messageFrederic Barrat2016-09-131-2/+2
* cxl: Set psl_fir_cntl to production environment valueFrederic Barrat2016-08-101-3/+6
* cxl: Fix NULL dereference in cxl_context_init() on PowerVM guestsAndrew Donnellan2016-08-091-1/+2
* cxl: Add cxl_check_and_switch_mode() API to switch bi-modal cardsAndrew Donnellan2016-07-141-18/+218
* cxl: Workaround PE=0 hardware limitation in Mellanox CX4Ian Munsie2016-07-141-0/+1
* cxl: Add support for using the kernel API with a real PHBIan Munsie2016-07-141-0/+3
* cxl: Do not create vPHB if there are no AFU configuration recordsIan Munsie2016-07-141-0/+3
* cxl: Enable bus mastering for devices using CAPP DMA modeIan Munsie2016-07-141-0/+3
* cxl: Add cxl_slot_is_supported APIIan Munsie2016-07-141-0/+37
* cxl: Ignore CAPI adapters misplaced in switched slotsPhilippe Bergheaud2016-07-081-0/+29
* cxl: Fix bug where AFU disable operation had no effectIan Munsie2016-07-081-0/+1
* cxl: Fix allowing bogus AFU descriptors with 0 maximum processesIan Munsie2016-07-081-0/+15
* cxl: Add support for CAPP DMA modeIan Munsie2016-06-161-1/+3
* cxl: Abstract the differences between the PSL and XSLFrederic Barrat2016-06-161-24/+128
* cxl: Increase timeout for detection of AFU mmio hangFrederic Barrat2016-04-221-1/+3
* cxl: Allow initialization on timebase sync failuresFrederic Barrat2016-04-221-9/+12
* cxl: Configure the PSL for two CAPI ports on POWER8NVLPhilippe Bergheaud2016-04-111-1/+40
* Merge tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/po...Linus Torvalds2016-03-191-150/+117Star
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| * cxl: Ignore probes for virtual afu pci devicesVaibhav Jain2016-03-091-0/+5
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