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* mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64Anup Patel2015-10-121-1/+1
| | | | | | | | | | | | | The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND for ARM64. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Pramod KUMAR <pramodku@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: Fix pointer type-cast in brcmnand_write()Anup Patel2015-10-121-2/+2
| | | | | | | | | | | | | | | We should always type-cast pointer to "long" or "unsigned long" because size of pointer is same as machine word size. This will avoid pointer type-cast issues on both 32bit and 64bit systems. This patch fixes pointer type-cast issue in brcmnand_write() as-per above info. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand_bbt: set the smallest size of bbt tableSheng Yong2015-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using nandsim to simulate a 128K block nand with `overridesize = 1', the size of mtd device is too small (mtd_size = 4 * block_size) to get the right length of bbt. Then when creating bbt, kzmalloc() will return ZERO_SIZE_PTR. This causes a NULL pointer oops when scanning bbt. [ 952.156166] BUG: unable to handle kernel NULL pointer dereference at 0000000000000010 [ 952.157064] IP: [<ffffffff8148ad4a>] nand_isreserved_bbt+0x2a/0x40 [ 952.157064] PGD 0 [ 952.157064] Oops: 0000 [#1] SMP [ 952.157064] Modules linked in: nandsim(+) [last unloaded: nandsim] [ 952.157064] CPU: 1 PID: 7103 Comm: modprobe Not tainted 4.2.0-rc3-next-20150724 #4 [ 952.157064] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006 [ 952.157064] task: ffff88003e24b980 ti: ffff88003d274000 task.ti: ffff88003d274000 [ 952.157064] RIP: 0010:[<ffffffff8148ad4a>] [<ffffffff8148ad4a>] nand_isreserved_bbt+0x2a/0x40 [ 952.157064] RSP: 0018:ffff88003d277b90 EFLAGS: 00010246 [ 952.157064] RAX: 0000000000000010 RBX: ffff88003d5a1000 RCX: 0000000000000000 [ 952.157064] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff88003d919000 [ 952.157064] RBP: ffff88003d277b98 R08: 0000000000020000 R09: 0000000000000000 [ 952.157064] R10: 0000000000000000 R11: 0000000000000195 R12: ffff88003d919000 [ 952.157064] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000 [ 952.157064] FS: 00007fada4d07700(0000) GS:ffff88003fd00000(0000) knlGS:0000000000000000 [ 952.157064] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b [ 952.157064] CR2: 0000000000000010 CR3: 0000000037924000 CR4: 00000000000006a0 [ 952.157064] Stack: [ 952.157064] ffffffff814851ec ffff88003d277ba8 ffffffff8147e35f ffff88003d277bf8 [ 952.157064] ffffffff814816f3 ffff88003d277c08 ffff88003d277bc8 0000000000000282 [ 952.157064] 0000000000000001 0000000000000000 ffff88003d209540 0000000000000001 [ 952.157064] Call Trace: [ 952.157064] [<ffffffff814851ec>] ? nand_block_isreserved+0x1c/0x20 [ 952.157064] [<ffffffff8147e35f>] mtd_block_isreserved+0x1f/0x30 [ 952.157064] [<ffffffff814816f3>] allocate_partition+0x463/0x6a0 [ 952.157064] [<ffffffff81481b3b>] add_mtd_partitions+0x4b/0xe0 [ 952.157064] [<ffffffff8147f14c>] mtd_device_parse_register+0x4c/0xe0 [ 952.157064] [<ffffffffa0013daf>] ns_init_module+0xdaf/0xde4 [nandsim] [ 952.157064] [<ffffffff8128d7c8>] ? kasprintf+0x38/0x40 [ 952.157064] [<ffffffffa0013000>] ? 0xffffffffa0013000 [ 952.157064] [<ffffffff810002c3>] do_one_initcall+0x83/0x1b0 [ 952.157064] [<ffffffff8113afab>] ? kmem_cache_alloc_trace+0x6b/0x120 [ 952.157064] [<ffffffff8160b503>] do_init_module+0x5c/0x1dd [ 952.157064] [<ffffffff810aa4db>] load_module+0x1bbb/0x20b0 [ 952.157064] [<ffffffff810a6fc0>] ? __symbol_put+0x30/0x30 [ 952.157064] [<ffffffff810aaac9>] SyS_init_module+0xf9/0x110 [ 952.157064] [<ffffffff810aa9d1>] ? SyS_init_module+0x1/0x110 [ 952.157064] [<ffffffff81615f57>] entry_SYSCALL_64_fastpath+0x12/0x6a [ 952.157064] Code: 00 55 48 8b 87 80 01 00 00 48 89 e5 8b 88 cc 00 00 00 48 8b 80 f0 03 00 00 5d 48 d3 fe 89 f2 83 e6 03 c1 fa 02 8d 0c 36 48 63 d2 <0f> b6 04 10 d3 f8 83 e0 03 3c 02 0f 94 c0 0f b6 c0 c3 0f 1f 40 [ 952.157064] RIP [<ffffffff8148ad4a>] nand_isreserved_bbt+0x2a/0x40 [ 952.157064] RSP <ffff88003d277b90> [ 952.157064] CR2: 0000000000000010 [ 952.204010] ---[ end trace 6ca2e1c041fdba36 ]--- This patch gives a smallest length to bbt, 1 byte, which is enough to represent up to 4 blocks. Signed-off-by: Sheng Yong <shengyong1@huawei.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: lpc32xx_slc: fix calculation of timing arcs from given valuesVladimir Zapolskiy2015-10-041-1/+1
| | | | | | | | | | | | | According to LPC32xx User's Manual all values measured in clock cycles are programmable from 1 to 16 clocks (4 bits) starting from 0 in bitfield, the current version of calculated clock cycles is too conservative. Correctness of 0 bitfield value (i.e. programmed 1 clock timing) is proven with actual NAND chip devices. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: lpc32xx_slc: fix potential overflow over 4 bitsVladimir Zapolskiy2015-10-041-1/+1
| | | | | | | | | In case if quotient of controller clock rate to device clock rate does not fit into 4 bit value, choose the maximum acceptable value 0xF, which stands for 16 clocks. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: lpc32xx_slc: improve SLCTAC_*() macro definitionsVladimir Zapolskiy2015-10-041-12/+15
| | | | | | | | | No functional change, move bitfield calculations to macro definitions with added clock rate argument, which are in turn defined by new common SLCTAC_CLOCKS(c, n, s) macro definition. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: fix bitflips in erased pagesBoris BREZILLON2015-10-021-1/+3
| | | | | | | | Use the nand_check_erased_ecc_chunk() function to test if the ECC error was triggered by an erased page containing a few bitflips. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: replace the NFC_BUF_TO_USER_DATA() macro by an inline functionBoris BREZILLON2015-10-021-5/+7
| | | | | | | | sunxi_nfc_user_data_to_buf() is exposed as an inline function, replace the NFC_BUF_TO_USER_DATA() macro by an inline function to be consistent. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: retrieve corrected OOB bytesBoris BREZILLON2015-10-021-1/+17
| | | | | | | | | The ECC engine is protecting a few OOB bytes. Retrieve them from the USER_DATA register instead of reading them in raw mode (ie without the ECC protection). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: factorize extra OOB bytes handlingBoris BREZILLON2015-10-021-42/+48
| | | | | | | | Add helper functions to factorize the code dealing extra OOB bytes in the normal and syndrome ECC implementations. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: make use of sunxi_nfc_hw_ecc_read/write_chunk()Boris BREZILLON2015-10-021-128/+40Star
| | | | | | | | | The sunxi_nfc_hw_ecc_read/write_chunk() functions have been created to factorize the code in the normal and syndrome ECC implementation. Make use of them where appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: introduce sunxi_nfc_hw_ecc_read/write_chunk()Boris BREZILLON2015-10-021-0/+92
| | | | | | | | | | | The logic behind normal and syndrome ECC handling is pretty much the same, the only difference is the ECC bytes placement. Create two functions to read/write ECC chunks. Those functions will later be used by the sunxi_nfc_hw_ecc_read/write_page() and sunxi_nfc_hw_syndrome_ecc_read/write_page() functions. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: create sunxi_nfc_hw_ecc_enable()/disable() functionsBoris BREZILLON2015-10-021-38/+32Star
| | | | | | | | The code used to enable/disable the hardware ECC engine is repeated in a lot of places. Create two functions to avoid code duplication. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: fsmc: Remove BUG macrosStefan Roese2015-10-021-3/+5
| | | | | | | | | Remove the BUG macros and return with error (if possible) instead. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: fsmc: Small whitespace cleanupStefan Roese2015-10-021-1/+1
| | | | | | | | | Remove tab in empty line. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: remove unused ->init_size() hookBoris BREZILLON2015-10-011-4/+1Star
| | | | | | | | | | | | | | The ->init_size() hook was introduced to let NAND controller drivers support NAND devices that could not be described in the nand_ids table. Since then, the core has added support for extended-id parsing and full-id description, thus allowing to describe pretty much all existing NANDs. Moreover, this hook is not used by any mainline driver, and should not be used by new drivers, because detecting the NAND chip is not something controller specific. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: remove unnecessary fields from brcmnand_socBrian Norris2015-09-301-2/+0Star
| | | | | | | These really aren't needed, especially now that we embed the soc struct in our private struct, so we can stash things there if needed. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: refactor iProc SoC layeringBrian Norris2015-09-301-11/+11
| | | | | | | Removes an unnecessary allocation and saves a little bit of pointer chasing. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: brcmnand: refactor bcm63138 SoC layeringBrian Norris2015-09-301-10/+8Star
| | | | | | | Removes an unnecessary allocation and saves a little bit of pointer chasing. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: sunxi: rework macrosBoris BREZILLON2015-09-301-59/+64
| | | | | | | | Suffix mask macros with _MSK and add new helper macros to avoid manually shifting values. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge MTD 4.3-rc updates into -nextBrian Norris2015-09-302-18/+11Star
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| * mxc_nand: fix copy_spareEric Benard2015-09-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | it was broken by 35d5d20efad8a04c8c002c7f31241dff973977a6 "mtd: mxc_nand: cleanup copy_spare function" else we get the following error : [ 22.709507] ubi0: attaching mtd3 [ 23.613470] ubi0: scanning is finished [ 23.617278] ubi0: empty MTD device detected [ 23.623219] Unhandled fault: imprecise external abort (0x1c06) at 0x9e62f0ec [ 23.630291] pgd = 9df80000 [ 23.633005] [9e62f0ec] *pgd=8e60041e(bad) [ 23.637064] Internal error: : 1c06 [#1] SMP ARM [ 23.641605] Modules linked in: [ 23.644687] CPU: 0 PID: 99 Comm: ubiattach Not tainted 4.2.0-dirty #22 [ 23.651222] Hardware name: Freescale i.MX53 (Device Tree Support) [ 23.657322] task: 9e687300 ti: 9dcfc000 task.ti: 9dcfc000 [ 23.662744] PC is at memcpy16_toio+0x4c/0x74 [ 23.667026] LR is at mxc_nand_command+0x484/0x640 [ 23.671739] pc : [<803f9c08>] lr : [<803faeb0>] psr: 60000013 [ 23.671739] sp : 9dcfdb10 ip : 9e62f0ea fp : 9dcfdb1c [ 23.683222] r10: a09c1000 r9 : 0000001a r8 : ffffffff [ 23.688453] r7 : ffffffff r6 : 9e674810 r5 : 9e674810 r4 : 000000b6 [ 23.694985] r3 : a09c16a4 r2 : a09c16a4 r1 : a09c16a4 r0 : 0000ffff [ 23.701521] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 23.708662] Control: 10c5387d Table: 8df80019 DAC: 00000015 [ 23.714413] Process ubiattach (pid: 99, stack limit = 0x9dcfc210) [ 23.720514] Stack: (0x9dcfdb10 to 0x9dcfe000) [ 23.724881] db00: 9dcfdb6c 9dcfdb20 803faeb0 803f9bc8 [ 23.733069] db20: 803f227c 803f9b74 ffffffff 9e674810 9e674810 9e674810 00000040 9e62f010 [ 23.741255] db40: 803faa2c 9e674b40 9e674810 803faa2c 00000400 803faa2c 00000000 9df42800 [ 23.749441] db60: 9dcfdb9c 9dcfdb70 803f2024 803faa38 9e4201cc 00000000 803f0a78 9e674b40 [ 23.757627] db80: 803f1f80 9e674810 00000400 00000400 9dcfdc14 9dcfdba0 803f3bd8 803f1f8c [ 23.765814] dba0: 9e4201cc 00000000 00000580 00000000 00000000 800718c0 0000007f 00001000 [ 23.774000] dbc0: 9df42800 000000e0 00000000 00000000 9e4201cc 00000000 00000000 00000000 [ 23.782186] dbe0: 00000580 00000580 00000000 9e674810 9dcfdc20 9dcfdce8 9df42800 00580000 [ 23.790372] dc00: 00000000 00000400 9dcfdc6c 9dcfdc18 803f3f94 803f39a4 9dcfdc20 00000000 [ 23.798558] dc20: 00000000 00000400 00000000 00000000 00000000 00000000 9df42800 00000000 [ 23.806744] dc40: 9dcfdd0c 00580000 00000000 00000400 00000000 9df42800 9dee1000 9d802000 [ 23.814930] dc60: 9dcfdc94 9dcfdc70 803eb63c 803f3f38 00000400 9dcfdce8 9df42800 dead4ead [ 23.823116] dc80: 803eb5f4 00000000 9dcfdcc4 9dcfdc98 803e82ac 803eb600 00000400 9dcfdce8 [ 23.831301] dca0: 9df42800 00000400 9dee0000 00000000 00000400 00000000 9dcfdd1c 9dcfdcc8 [ 23.839488] dcc0: 80406048 803e8230 00000400 9dcfdce8 9df42800 9dcfdc78 00000008 00000000 [ 23.847673] dce0: 00000000 00000000 00000000 00000004 00000000 9df42800 9dee0000 00000000 [ 23.855859] dd00: 9d802030 00000000 9dc8b214 9d802000 9dcfdd44 9dcfdd20 804066cc 80405f50 [ 23.864047] dd20: 00000400 9dc8b200 9d802030 9df42800 9dee0000 9dc8b200 9dcfdd84 9dcfdd48 [ 23.872233] dd40: 8040a544 804065ac 9e401c80 000080d0 9dcfdd84 00000001 800fc828 9df42400 [ 23.880418] dd60: 00000000 00000080 9dc8b200 9dc8b200 9dc8b200 9dee0000 9dcfdddc 9dcfdd88 [ 23.888605] dd80: 803fb560 8040a440 9dcfddc4 9dcfdd98 800f1428 9dee1000 a0acf000 00000000 [ 23.896792] dda0: 00000000 ffffffff 00000006 00000000 9dee0000 9dee0000 00005600 00000080 [ 23.904979] ddc0: 9dc8b200 a0acf000 9dc8b200 8112514c 9dcfde24 9dcfdde0 803fc08c 803fb4f0 [ 23.913165] dde0: 9e401c80 00000013 9dcfde04 9dcfddf8 8006bbf8 8006ba00 9dcfde24 00000000 [ 23.921351] de00: 9dee0000 00000065 9dee0000 00000001 9dc8b200 8112514c 9dcfde84 9dcfde28 [ 23.929538] de20: 8040afa0 803fb948 ffffffff 00000000 9dc8b214 9dcfde40 800f1428 800f11dc [ 23.937724] de40: 9dc8b21c 9dc8b20c 9dc8b204 9dee1000 9dc8b214 8069bb60 fffff000 fffff000 [ 23.945911] de60: 9e7b5400 00000000 9dee0000 9dee1000 00001000 9e7b5400 9dcfdecc 9dcfde88 [ 23.954097] de80: 803ff1bc 8040a630 9dcfdea4 9dcfde98 00000800 00000800 9dcfdecc 9dcfdea8 [ 23.962284] dea0: 803e8f6c 00000000 7e87ab70 9e7b5400 80113e30 00000003 9dcfc000 00000000 [ 23.970470] dec0: 9dcfdf04 9dcfded0 804008cc 803feb98 ffffffff 00000003 00000000 00000000 [ 23.978656] dee0: 00000000 00000000 9e7cb000 9dc193e0 7e87ab70 9dd92140 9dcfdf7c 9dcfdf08 [ 23.986842] df00: 80113b5c 8040080c 800fbed8 8006bbf0 9e7cb000 00000003 9e7cb000 9dd92140 [ 23.995029] df20: 9dc193e0 9dd92148 9dcfdf4c 9dcfdf38 8011022c 800fbe78 8000f9cc 9e687300 [ 24.003216] df40: 9dcfdf6c 9dcfdf50 8011f798 8007ffe8 7e87ab70 9dd92140 00000003 9dd92140 [ 24.011402] df60: 40186f40 7e87ab70 9dcfc000 00000000 9dcfdfa4 9dcfdf80 80113e30 8011373c [ 24.019588] df80: 7e87ab70 7e87ab70 7e87aea9 00000036 8000fb84 9dcfc000 00000000 9dcfdfa8 [ 24.027775] dfa0: 8000f9a0 80113e00 7e87ab70 7e87ab70 00000003 40186f40 7e87ab70 00000000 [ 24.035962] dfc0: 7e87ab70 7e87ab70 7e87aea9 00000036 00000000 00000000 76fd1f70 00000000 [ 24.044148] dfe0: 76f80f8c 7e87ab28 00009810 76f80fc4 60000010 00000003 00000000 00000000 [ 24.052328] Backtrace: [ 24.054806] [<803f9bbc>] (memcpy16_toio) from [<803faeb0>] (mxc_nand_command+0x484/0x640) [ 24.062996] [<803faa2c>] (mxc_nand_command) from [<803f2024>] (nand_write_page+0xa4/0x154) [ 24.071264] r10:9df42800 r9:00000000 r8:803faa2c r7:00000400 r6:803faa2c r5:9e674810 [ 24.079180] r4:9e674b40 [ 24.081738] [<803f1f80>] (nand_write_page) from [<803f3bd8>] (nand_do_write_ops+0x240/0x444) [ 24.090180] r8:00000400 r7:00000400 r6:9e674810 r5:803f1f80 r4:9e674b40 [ 24.096970] [<803f3998>] (nand_do_write_ops) from [<803f3f94>] (nand_write+0x68/0x88) [ 24.104804] r10:00000400 r9:00000000 r8:00580000 r7:9df42800 r6:9dcfdce8 r5:9dcfdc20 [ 24.112719] r4:9e674810 [ 24.115287] [<803f3f2c>] (nand_write) from [<803eb63c>] (part_write+0x48/0x50) [ 24.122514] r10:9d802000 r9:9dee1000 r8:9df42800 r7:00000000 r6:00000400 r5:00000000 [ 24.130429] r4:00580000 [ 24.132989] [<803eb5f4>] (part_write) from [<803e82ac>] (mtd_write+0x88/0xa0) [ 24.140129] r5:00000000 r4:803eb5f4 [ 24.143748] [<803e8224>] (mtd_write) from [<80406048>] (ubi_io_write+0x104/0x65c) [ 24.151235] r7:00000000 r6:00000400 r5:00000000 r4:9dee0000 [ 24.156968] [<80405f44>] (ubi_io_write) from [<804066cc>] (ubi_io_write_ec_hdr+0x12c/0x190) [ 24.165323] r10:9d802000 r9:9dc8b214 r8:00000000 r7:9d802030 r6:00000000 r5:9dee0000 [ 24.173239] r4:9df42800 [ 24.175798] [<804065a0>] (ubi_io_write_ec_hdr) from [<8040a544>] (ubi_early_get_peb+0x110/0x1f0) [ 24.184587] r6:9dc8b200 r5:9dee0000 r4:9df42800 [ 24.189262] [<8040a434>] (ubi_early_get_peb) from [<803fb560>] (create_vtbl+0x7c/0x238) [ 24.197271] r10:9dee0000 r9:9dc8b200 r8:9dc8b200 r7:9dc8b200 r6:00000080 r5:00000000 [ 24.205187] r4:9df42400 [ 24.207746] [<803fb4e4>] (create_vtbl) from [<803fc08c>] (ubi_read_volume_table+0x750/0xa64) [ 24.216187] r10:8112514c r9:9dc8b200 r8:a0acf000 r7:9dc8b200 r6:00000080 r5:00005600 [ 24.224103] r4:9dee0000 [ 24.226662] [<803fb93c>] (ubi_read_volume_table) from [<8040afa0>] (ubi_attach+0x97c/0x152c) [ 24.235103] r10:8112514c r9:9dc8b200 r8:00000001 r7:9dee0000 r6:00000065 r5:9dee0000 [ 24.243018] r4:00000000 [ 24.245579] [<8040a624>] (ubi_attach) from [<803ff1bc>] (ubi_attach_mtd_dev+0x630/0xbac) [ 24.253673] r10:9e7b5400 r9:00001000 r8:9dee1000 r7:9dee0000 r6:00000000 r5:9e7b5400 [ 24.261588] r4:fffff000 [ 24.264148] [<803feb8c>] (ubi_attach_mtd_dev) from [<804008cc>] (ctrl_cdev_ioctl+0xcc/0x1cc) [ 24.272589] r10:00000000 r9:9dcfc000 r8:00000003 r7:80113e30 r6:9e7b5400 r5:7e87ab70 [ 24.280505] r4:00000000 [ 24.283070] [<80400800>] (ctrl_cdev_ioctl) from [<80113b5c>] (do_vfs_ioctl+0x42c/0x6c4) [ 24.291077] r6:9dd92140 r5:7e87ab70 r4:9dc193e0 [ 24.295753] [<80113730>] (do_vfs_ioctl) from [<80113e30>] (SyS_ioctl+0x3c/0x64) [ 24.303066] r10:00000000 r9:9dcfc000 r8:7e87ab70 r7:40186f40 r6:9dd92140 r5:00000003 [ 24.310981] r4:9dd92140 [ 24.313549] [<80113df4>] (SyS_ioctl) from [<8000f9a0>] (ret_fast_syscall+0x0/0x54) [ 24.321123] r9:9dcfc000 r8:8000fb84 r7:00000036 r6:7e87aea9 r5:7e87ab70 r4:7e87ab70 [ 24.328957] Code: e1c300b0 e1510002 e1a03001 1afffff9 (e89da800) [ 24.335066] ---[ end trace ab1cb17887f21bbb ]--- [ 24.340249] Unhandled fault: imprecise external abort (0x1c06) at 0x7ee8bcf0 [ 24.347310] pgd = 9df3c000 [ 24.350023] [7ee8bcf0] *pgd=8dcbf831, *pte=8eb3334f, *ppte=8eb3383f Segmentation fault Fixes: 35d5d20efad8 ("mtd: mxc_nand: cleanup copy_spare function") Signed-off-by: Eric Bénard <eric@eukrea.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Baruch Siach <baruch@tkos.co.il> Cc: <stable@vger.kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: sunxi: fix sunxi_nand_chips_cleanup()Boris BREZILLON2015-09-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The sunxi_nand_chips_cleanup() function is missing a call to list_del() which generates a double free error. Reported-by: Priit Laes <plaes@plaes.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: <stable@vger.kernel.org> # 3.19+ Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Tested-by: Priit Laes <plaes@plaes.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: sunxi: fix OOB handling in ->write_xxx() functionsBoris BREZILLON2015-09-211-17/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USER_DATA register cannot be accessed using byte accessors on A13 SoCs, thus triggering a bug when using memcpy_toio on this register. Declare an helper macros to convert an OOB buffer into a suitable USER_DATA value and vice-versa. This patch also fixes an error in the oob_required logic (some OOB data are not written even if the user required it) by removing the oob_required condition, which is perfectly valid since the core already fill ->oob_poi with FFs when oob_required is false. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: <stable@vger.kernel.org> # 3.19+ Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: vf610_nfc: include missing pincrl/consumer.hBrian Norris2015-09-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This must have been implicitly included on the builds I tested. Reported by numerous test bots: drivers/mtd/nand/vf610_nfc.c: In function 'vf610_nfc_resume': drivers/mtd/nand/vf610_nfc.c:660:2: error: implicit declaration of function 'pinctrl_pm_select_default_state' [-Werror=implicit-function-declaration] pinctrl_pm_select_default_state(dev); ^ Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
* | mtd: nand: vf610_nfc: add hardware BCH-ECC supportStefan Agner2015-09-292-4/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds hardware ECC support using the BCH encoder in the NFC IP. The ECC encoder supports up to 32-bit correction by using 60 error correction bytes. There is no sub-page ECC step, ECC is calculated always across the whole page (up to 2k pages). Limitations: - HW ECC: Only 2K page with 64+ OOB. - HW ECC: Only 24 and 32-bit error correction implemented. Raw writes have been tested using the generic nand_write_page_raw implementation. However, raw reads are currently not possible because the controller need to know whether we are going to use the ECC mode already at NAND_CMD_READ0 command time. At this point we do not have the information whether it is a raw read or a regular read at driver level... Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: vf610_nfc: Freescale NFC for VF610, MPC5125 and othersStefan Agner2015-09-293-0/+696
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports Freescale NFC (NAND flash controller) found on Vybrid (VF610), MPC5125, MCF54418 and Kinetis K70. The driver has been tested using 8-bit and 16-bit NAND interface on the ARM based Vybrid SoC VF500 and VF610 platform. parameter page reading. Limitations: - Untested on MPC5125 and M54418. - DMA and pipelining not used. - 2K pages or less. - No chip select, one NAND chip per controller. - No hardware ECC. Some paths have been hand-optimized and evaluated by measurements made using mtd_speedtest.ko on a 100MB MTD partition. Colibri VF50 eb write % eb read % page write % page read % rel/opt 5175 11537 4560 11039 opt 5164 -0.21 11420 -1.01 4737 +3.88 10918 -1.10 none 5113 -1.20 11352 -1.60 4490 -1.54 10865 -1.58 Colibri VF61 eb write % eb read % page write % page read % rel/opt 5766 13096 5459 12846 opt 5883 +2.03 13064 -0.24 5561 +1.87 12802 -0.34 none 5701 -1.13 12980 -0.89 5488 +0.53 12735 -0.86 rel = using readl_relaxed/writel_relaxed in optimized paths opt = hand-optimized by combining multiple accesses into one read/write The measurements have not been statistically verfied, hence use them with care. The author came to the conclusion that using the relaxed variants of readl/writel are not worth the additional code. Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Tested-by: Albert ARIBAUD <albert.aribaud@3adev.fr> Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Alexey Klimov <klimov.linux@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: denali: max_banks calculation changed in revision 5.1Graham Moore2015-09-292-1/+12
| | | | | | | | | | | | | | | | | | | | Read Denali hardware revision number and use it to calculate max_banks, The encoding of max_banks changed in Denali revision 5.1. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> [Brian: parentheses around macro arg] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: denali: pass col argument to READID operationEnrico Jorns2015-09-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | A read id operation followed by 0x00 reads the device ID while a read id operation followed by 0x20 reads the possible ONFI identifier. As the READID function did not propagate the second id parameter but had a hard-coded call for 0x90 0x00, reading the ONFI identifier was not possible and thus chips werde not detected (tested with MT29F8G08ABABAWP) Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: pxa3xx-nand: prevent DFI bus lockup on removalRobert Jarzmik2015-09-291-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the conversion of pxa architecture to common clock framework, the NAND clock can be disabled on driver exit. In this case, it happens that if the driver used the NAND and set the DFI arbitration bit, the next access to a static memory controller area, such as an ethernet card, will stall the system bus, and the core will be stalled forever. This is especially true on pxa31x SoCs, where the NDCR was augmented with a new bit to prevent this lockups by giving full ownership of the DFI arbiter to the SMC, in change SCr#6. Fix this by clearing the DFI arbritration bit in driver exit. This effectively prevents a lockup on zylonite when removing pxa3xx-nand module, and using ethernet afterwards. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: mxc_nand: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-291-0/+1
| | | | | | | | | | | | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: mpc5121_nfc: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-291-0/+1
| | | | | | | | | | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: fsl_ifc_nand: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-291-0/+1
| | | | | | | | | | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: fsl_elbc_nand: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-291-0/+1
| | | | | | | | | | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: orion_nand: Fix module autoload for OF platform driverLuis de Bethencourt2015-09-291-0/+1
| | | | | | | | | | | | | | | | | | This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: pxa3xx-nand: switch to dmaengineRobert Jarzmik2015-09-281-114/+108Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now pxa architecture has a dmaengine driver, remove the access to direct dma registers in favor of the more generic dmaengine code. This should be also applicable for mmp and orion, provided they work in device-tree environment. This patch also removes the previous hack which was necessary to make the driver work in a devicetree environment. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> [Brian: fixup use of 'enum dma_transfer_direction'] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nandsim: drop null test before destroy functionsJulia Lawall2015-09-221-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded NULL test. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x; @@ -if (x != NULL) \(kmem_cache_destroy\|mempool_destroy\|dma_pool_destroy\)(x); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: add nand_check_erased helper functionsBoris BREZILLON2015-09-221-0/+128
| | | | | | | | | | | | | | | | Add two helper functions to help NAND controller drivers test whether a specific NAND region is erased or not. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Merge tag 'v4.3-rc1' into MTD -next developmentBrian Norris2015-09-142-129/+131
|\|
| * Merge tag 'for-linus-20150909' of git://git.infradead.org/linux-mtdLinus Torvalds2015-09-091-1/+2
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull more MTD updates from Brian Norris: "There was one significant bug in my first pull request, fixed here. I also threw in a few trivial ID additions and a small module rename. Details: - SPI NOR: bug fix for a "end of table" check that resulted in a NULL dereference in some cases - SPI NOR: a few new IDs / feature flags - OMAP2 NAND: rename module so it doesn't conflict with onenand omap2.ko" * tag 'for-linus-20150909' of git://git.infradead.org/linux-mtd: mtd: spi-nor: fix NULL dereference when no match found in spi_nor_ids[] mtd: spi-nor: s25sl064p supports both dual and quad I/O mtd: spi-nor: allow dual/quad reads on S25FL129P mtd: nand: omap2: Rename shippable module to omap2_nand mtd: spi-nor: Add support for sst25wf020a mtd: spi-nor: Add support for Micron n25q064a serial flash
| * \ Merge tag 'libnvdimm-for-4.3' of ↵Linus Torvalds2015-09-081-1/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm Pull libnvdimm updates from Dan Williams: "This update has successfully completed a 0day-kbuild run and has appeared in a linux-next release. The changes outside of the typical drivers/nvdimm/ and drivers/acpi/nfit.[ch] paths are related to the removal of IORESOURCE_CACHEABLE, the introduction of memremap(), and the introduction of ZONE_DEVICE + devm_memremap_pages(). Summary: - Introduce ZONE_DEVICE and devm_memremap_pages() as a generic mechanism for adding device-driver-discovered memory regions to the kernel's direct map. This facility is used by the pmem driver to enable pfn_to_page() operations on the page frames returned by DAX ('direct_access' in 'struct block_device_operations'). For now, the 'memmap' allocation for these "device" pages comes from "System RAM". Support for allocating the memmap from device memory will arrive in a later kernel. - Introduce memremap() to replace usages of ioremap_cache() and ioremap_wt(). memremap() drops the __iomem annotation for these mappings to memory that do not have i/o side effects. The replacement of ioremap_cache() with memremap() is limited to the pmem driver to ease merging the api change in v4.3. Completion of the conversion is targeted for v4.4. - Similar to the usage of memcpy_to_pmem() + wmb_pmem() in the pmem driver, update the VFS DAX implementation and PMEM api to provide persistence guarantees for kernel operations on a DAX mapping. - Convert the ACPI NFIT 'BLK' driver to map the block apertures as cacheable to improve performance. - Miscellaneous updates and fixes to libnvdimm including support for issuing "address range scrub" commands, clarifying the optimal 'sector size' of pmem devices, a clarification of the usage of the ACPI '_STA' (status) property for DIMM devices, and other minor fixes" * tag 'libnvdimm-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: (34 commits) libnvdimm, pmem: direct map legacy pmem by default libnvdimm, pmem: 'struct page' for pmem libnvdimm, pfn: 'struct page' provider infrastructure x86, pmem: clarify that ARCH_HAS_PMEM_API implies PMEM mapped WB add devm_memremap_pages mm: ZONE_DEVICE for "device memory" mm: move __phys_to_pfn and __pfn_to_phys to asm/generic/memory_model.h dax: drop size parameter to ->direct_access() nd_blk: change aperture mapping from WC to WB nvdimm: change to use generic kvfree() pmem, dax: have direct_access use __pmem annotation dax: update I/O path to do proper PMEM flushing pmem: add copy_from_iter_pmem() and clear_pmem() pmem, x86: clean up conditional pmem includes pmem: remove layer when calling arch_has_wmb_pmem() pmem, x86: move x86 PMEM API to new pmem.h header libnvdimm, e820: make CONFIG_X86_PMEM_LEGACY a tristate option pmem: switch to devm_ allocations devres: add devm_memremap libnvdimm, btt: write and validate parent_uuid ...
| | * | arch, drivers: don't include <asm/io.h> directly, use <linux/io.h> insteadDan Williams2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Preparation for uniform definition of ioremap, ioremap_wc, ioremap_wt, and ioremap_cache, tree-wide. Acked-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | | Merge tag 'powerpc-4.3-1' of ↵Linus Torvalds2015-09-041-128/+130
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: - support "hybrid" iommu/direct DMA ops for coherent_mask < dma_mask from Benjamin Herrenschmidt - EEH fixes for SRIOV from Gavin - introduce rtas_get_sensor_fast() for IRQ handlers from Thomas Huth - use hardware RNG for arch_get_random_seed_* not arch_get_random_* from Paul Mackerras - seccomp filter support from Michael Ellerman - opal_cec_reboot2() handling for HMIs & machine checks from Mahesh Salgaonkar - add powerpc timebase as a trace clock source from Naveen N. Rao - misc cleanups in the xmon, signal & SLB code from Anshuman Khandual - add an inline function to update POWER8 HID0 from Gautham R. Shenoy - fix pte_pagesize_index() crash on 4K w/64K hash from Michael Ellerman - drop support for 64K local store on 4K kernels from Michael Ellerman - move dma_get_required_mask() from pnv_phb to pci_controller_ops from Andrew Donnellan - initialize distance lookup table from drconf path from Nikunj A Dadhania - enable RTC class support from Vaibhav Jain - disable automatically blocked PCI config from Gavin Shan - add LEDs driver for PowerNV platform from Vasant Hegde - fix endianness issues in the HVSI driver from Laurent Dufour - kexec endian fixes from Samuel Mendoza-Jonas - fix corrupted pdn list from Gavin Shan - fix fenced PHB caused by eeh_slot_error_detail() from Gavin Shan - Freescale updates from Scott: Highlights include 32-bit memcpy/memset optimizations, checksum optimizations, 85xx config fragments and updates, device tree updates, e6500 fixes for non-SMP, and misc cleanup and minor fixes. - a ton of cxl updates & fixes: - add explicit precision specifiers from Rasmus Villemoes - use more common format specifier from Rasmus Villemoes - destroy cxl_adapter_idr on module_exit from Johannes Thumshirn - destroy afu->contexts_idr on release of an afu from Johannes Thumshirn - compile with -Werror from Daniel Axtens - EEH support from Daniel Axtens - plug irq_bitmap getting leaked in cxl_context from Vaibhav Jain - add alternate MMIO error handling from Ian Munsie - allow release of contexts which have been OPENED but not STARTED from Andrew Donnellan - remove use of macro DEFINE_PCI_DEVICE_TABLE from Vaishali Thakkar - release irqs if memory allocation fails from Vaibhav Jain - remove racy attempt to force EEH invocation in reset from Daniel Axtens - fix + cleanup error paths in cxl_dev_context_init from Ian Munsie - fix force unmapping mmaps of contexts allocated through the kernel api from Ian Munsie - set up and enable PSL Timebase from Philippe Bergheaud * tag 'powerpc-4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (140 commits) cxl: Set up and enable PSL Timebase cxl: Fix force unmapping mmaps of contexts allocated through the kernel api cxl: Fix + cleanup error paths in cxl_dev_context_init powerpc/eeh: Fix fenced PHB caused by eeh_slot_error_detail() powerpc/pseries: Cleanup on pci_dn_reconfig_notifier() powerpc/pseries: Fix corrupted pdn list powerpc/powernv: Enable LEDS support powerpc/iommu: Set default DMA offset in dma_dev_setup cxl: Remove racy attempt to force EEH invocation in reset cxl: Release irqs if memory allocation fails cxl: Remove use of macro DEFINE_PCI_DEVICE_TABLE powerpc/powernv: Fix mis-merge of OPAL support for LEDS driver powerpc/powernv: Reset HILE before kexec_sequence() powerpc/kexec: Reset secondary cpu endianness before kexec powerpc/hvsi: Fix endianness issues in the HVSI driver leds/powernv: Add driver for PowerNV platform powerpc/powernv: Create LED platform device powerpc/powernv: Add OPAL interfaces for accessing and modifying system LED states powerpc/powernv: Fix the log message when disabling VF cxl: Allow release of contexts which have been OPENED but not STARTED ...
| | * | | fsl_ifc: Change IO accessor based on endiannessJaiprakash Singh2015-08-081-128/+130
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC IO accressor are set at run time based on IFC IP registers endianness.IFC node in DTS file contains information about endianness. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Brian Norris <computersforpeace@gmail.com>
* | | | mtd: nand: sunxi: rely on nand_dt_init initializationBoris BREZILLON2015-09-121-17/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_dt_init(), called from nand_scan_ident(), is already parsing the generic MTD/NAND DT properties, and initializing the nand_chip struct accordingly. Rely on this initialization instead of manually parsing those properties. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Brian: rename 'np' -> 'flash_node' to accomodate for prior rename patch] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | | mtd: nand: Rename nand_chip .dn to .flash_nodeMarek Vasut2015-09-122-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a more descriptive name for the device_node element in struct nand_chip . This name matches the element name used for device_node property of a flash in the spi-nor framework. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | | mtd: sunxi_nand: Select the chip in sunxi_nand_chip_init_timings()Stefan Roese2015-09-101-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_scan_ident() leaves the chip deselected. So just issuing some commands from the sunxi driver does not work. We need to select the chip before writing the commands to the NAND device. This patch takes care of this. Set the new timing on all dies implemented as suggested by Boris. This was detected on the in-circuit ICnova-A20 SoM equipped with the Micron MT29F32G08CBACAWP (4GiB) ONFI NAND device. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Roy Spliet <r.spliet@ultimaker.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Brian: fixup whitespace] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | | mtd: pxa3xx_nand: Remove unused platform-data flash specificationEzequiel García2015-09-021-6/+27
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver supports board files specificating the flash device, by passing a pxa3xx_nand_flash struct (with flash parameters) in the platform data struct. Currently this support is not being used by any board file. Moreover, we'd like to deprecate such usage in favor of using the device table in nand_ids.c. So let's remove the ad-hoc flash specification. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: omap2: Rename shippable module to omap2_nandRoger Quadros2015-09-021-1/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As both omap2 onenand and omap2 nand driver modules are named the same i.e. "omap2.ko", only one of them gets shipped during MODPOST if both are configured as loadable modules. To avoid this ambiguity let's ship the omap2 nand driver as "omap2_nand.ko" Reported by Pierre Neyron via github https://github.com/beagleboard/linux/issues/40 Cc: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: add Toshiba TC58NVG0S3E to nand_ids tableOleksij Rempel2015-08-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add the full description of the Toshiba TC58NVG0S3E NAND chip in the nand_ids table so that we can later use the NAND ECC info and ONFI timing mode in controller drivers. Tested with asm9260_nand driver. [Brian: driver still under review] Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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