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* Merge tag 'mtd/fixes-for-5.3-rc3' of ↵Linus Torvalds2019-08-051-3/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD fixes from Miquel Raynal: "NAND: - Fix Micron driver as some chips enable internal ECC correction during their discovery while they advertize they do not have any. Hyperbus: - Restrict the build to only ARM64 SoCs (and compile testing) which is what should have been done since the beginning. - Fix Kconfig issue by selection something instead of implying it" * tag 'mtd/fixes-for-5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: mtd: hyperbus: Add hardware dependency to AM654 driver mtd: hyperbus: Kconfig: Fix HBMC_AM654 dependencies mtd: rawnand: micron: handle on-die "ECC-off" devices correctly
| * mtd: rawnand: micron: handle on-die "ECC-off" devices correctlyMarco Felsch2019-08-031-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices are not supposed to support on-die ECC but experience shows that internal ECC machinery can actually be enabled through the "SET FEATURE (EFh)" command, even if a read of the "READ ID Parameter Tables" returns that it is not. Currently, the driver checks the "READ ID Parameter" field directly after having enabled the feature. If the check fails it returns immediately but leaves the ECC on. When using buggy chips like MT29F2G08ABAGA and MT29F2G08ABBGA, all future read/program cycles will go through the on-die ECC, confusing the host controller which is supposed to be the one handling correction. To address this in a common way we need to turn off the on-die ECC directly after reading the "READ ID Parameter" and before checking the "ECC status". Cc: stable@vger.kernel.org Fixes: dbc44edbf833 ("mtd: rawnand: micron: Fix on-die ECC detection logic") Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | mtd: onenand_base: Mark expected switch fall-throughGustavo A. R. Silva2019-07-261-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. This patch fixes the following warning: drivers/mtd/nand/onenand/onenand_base.c: In function ‘onenand_check_features’: drivers/mtd/nand/onenand/onenand_base.c:3264:17: warning: this statement may fall through [-Wimplicit-fallthrough=] this->options |= ONENAND_HAS_NOP_1; drivers/mtd/nand/onenand/onenand_base.c:3265:2: note: here case ONENAND_DEVICE_DENSITY_4Gb: ^~~~ Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Cc: Jonathan Bakker <xc-racer2@live.ca> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
* docs: mtd: move it to the driver-api bookMauro Carvalho Chehab2019-07-151-1/+1
| | | | | | | | | | While I was tempted to move it to admin-guide, as some docs there are more userspace-faced, there are some very technical discussions about memory error correction code from the Kernel implementer's PoV. So, let's place it inside the driver-api book. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
* docs: mtd: convert to ReSTMauro Carvalho Chehab2019-07-151-1/+1
| | | | | | | | | | | | | | | | Rename the mtd documentation files to ReST, add an index for them and adjust in order to produce a nice html output via the Sphinx build system. It should be noticed that Sphinx doesn't handle very well URLs with dots in the middle. Thankfully, internally, the '.' char is translated to %2E, so we can jus use %2E instead of dots, and this will work fine on both text and processed files. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
* Merge tag 'mtd/for-5.3' of ↵Linus Torvalds2019-07-1418-1668/+1803
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "This contains the following changes for MTD: MTD core changes: - New Hyperbus framework - New _is_locked (concat) implementation - Various cleanups NAND core changes: - use longest matching pattern in ->exec_op() default parser - export NAND operation tracer - add flag to indicate panic_write in MTD - use kzalloc() instead of kmalloc() and memset() Raw NAND controller drivers changes: - brcmnand: - fix BCH ECC layout for large page NAND parts - fallback to detected ecc-strength, ecc-step-size - when oops in progress use pio and interrupt polling - code refactor code to introduce helper functions - add support for v7.3 controller - FSMC: - use nand_op_trace for operation tracing - GPMI: - move all driver code into single file - various cleanups (including dmaengine changes) - use runtime PM to manage clocks - implement exec_op - MTK: - correct low level time calculation of r/w cycle - improve data sampling timing for read cycle - add validity check for CE# pin setting - fix wrongly assigned OOB buffer pointer issue - re-license MTK NAND driver as Dual MIT/GPL - STM32: - manage the get_irq error case - increase DMA completion timeouts Raw NAND chips drivers changes: - Macronix: add read-retry support Onenand driver changes: - add support for 8Gb datasize chips - avoid fall-through warnings SPI-NAND changes: - define macros for page-read ops with three-byte addresses - add support for two-byte device IDs and then for GigaDevice GD5F1GQ4UFxxG - add initial support for Paragon PN26G0xA - handle the case where the last page read has bitflips SPI-NOR core changes: - add support for the mt25ql02g and w25q16jv flashes - print error in case of jedec read id fails - is25lp256: add post BFPT fix to correct the addr_width SPI NOR controller drivers changes: - intel-spi: Add support for Intel Elkhart Lake SPI serial flash - smt32: remove the driver as the driver was replaced by spi-stm32-qspi.c - cadence-quadspi: add reset control" * tag 'mtd/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (60 commits) mtd: concat: implement _is_locked mtd operation mtd: concat: refactor concat_lock/concat_unlock mtd: abi: do not use C++ style comments in uapi header mtd: afs: remove unneeded NULL check mtd: rawnand: stm32_fmc2: increase DMA completion timeouts mtd: rawnand: Use kzalloc() instead of kmalloc() and memset() mtd: hyperbus: Add driver for TI's HyperBus memory controller mtd: spinand: read returns badly if the last page has bitflips mtd: spinand: Add initial support for Paragon PN26G0xA mtd: rawnand: mtk: Re-license MTK NAND driver as Dual MIT/GPL mtd: rawnand: gpmi: remove double assignment to block_size dt-bindings: mtd: brcmnand: Add brcmnand, brcmnand-v7.3 support mtd: rawnand: brcmnand: Add support for v7.3 controller mtd: rawnand: brcmnand: Refactored code to introduce helper functions mtd: rawnand: brcmnand: When oops in progress use pio and interrupt polling mtd: Add flag to indicate panic_write mtd: rawnand: Add Macronix NAND read retry support mtd: onenand: Avoid fall-through warnings mtd: spinand: Add support for GigaDevice GD5F1GQ4UFxxG mtd: spinand: Add support for two-byte device IDs ...
| * mtd: rawnand: stm32_fmc2: increase DMA completion timeoutsAmelie Delaunay2019-06-281-6/+9
| | | | | | | | | | | | | | | | | | When the system is overloaded, DMA data transfer completion occurs after 100ms. Increase the timeouts to let it the time to complete. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: Use kzalloc() instead of kmalloc() and memset()Fuqian Huang2019-06-281-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | Replace kmalloc() by a memset() followed with a kzalloc(). There is a recommendation to use zeroing allocator rather than allocator followed by memset(0) in ./scripts/coccinelle/api/alloc/zalloc-simple.cocci Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spinand: read returns badly if the last page has bitflipsliaoweixiong2019-06-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of the last page containing bitflips (ret > 0), spinand_mtd_read() will return that number of bitflips for the last page while it should instead return max_bitflips like it does when the last page read returns with 0. Signed-off-by: Weixiong Liao <liaoweixiong@allwinnertech.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Cc: stable@vger.kernel.org Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spinand: Add initial support for Paragon PN26G0xAJeff Kletsky2019-06-273-1/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Paragon Technology PN26G01Axxxxx and PN26G02Axxxxx SPI NAND Datasheets available at http://www.xtxtech.com/upfile/2016082517274590.pdf http://www.xtxtech.com/upfile/2016082517282329.pdf Signed-off-by: Jeff Kletsky <git-commits@allycomm.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: mtk: Re-license MTK NAND driver as Dual MIT/GPLXiaolei Li2019-06-273-7/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is wanted to use MTK NAND driver with GPL-2.0 or MIT license. But now it is only licensed as GPL-2.0, so re-license it as dual MIT/GPL. Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Acked-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Wen Yang <yellowriver2010@hotmail.com> Acked-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: RogerCC Lin <rogercc.lin@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: remove double assignment to block_sizeColin Ian King2019-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | The variable block_size is being assigned to itself and to geo->ecc_chunk_size. Clean up the double assignment by removing the assignment to itself. Addresses-Coverity: ("Evaluation order violation") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: brcmnand: Add support for v7.3 controllerKamal Dasu2019-06-271-22/+80
| | | | | | | | | | | | | | | | | | This change adds support for brcm NAND v7.3 controller. This controller uses a newer version of flash_dma engine and change mostly implements these differences. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: brcmnand: Refactored code to introduce helper functionsKamal Dasu2019-06-271-38/+62
| | | | | | | | | | | | | | | | Refactored NAND ECC and CMD address configuration code to use helper functions. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: brcmnand: When oops in progress use pio and interrupt pollingKamal Dasu2019-06-271-3/+45
| | | | | | | | | | | | | | | | | | If mtd_oops is in progress, switch to polling during NAND command completion instead of relying on DMA/interrupts so that the mtd_oops buffer can be completely written in the assigned NAND partition. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: Add Macronix NAND read retry supportMason Yang2019-06-271-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Macronix NAND read retry. Macronix NANDs support specific read operation for data recovery, which can be enabled with a SET_FEATURE. Driver checks byte 167 of Vendor Blocks in ONFI parameter page table to see if this high-reliability function is supported. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: onenand: Avoid fall-through warningsGustavo A. R. Silva2019-06-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NOTICE THAT: "...we don't know whether we need fallthroughs or breaks here and this is just a change to avoid having new warnings when switching to -Wimplicit-fallthrough but this change might be entirely wrong."[1] See the original thread of discussion here: https://lore.kernel.org/patchwork/patch/1036251/ So, in preparation to enabling -Wimplicit-fallthrough, this patch silences the following warnings: drivers/mtd/nand/onenand/onenand_base.c: In function ‘onenand_check_features’: drivers/mtd/nand/onenand/onenand_base.c:3264:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (ONENAND_IS_DDP(this)) ^ drivers/mtd/nand/onenand/onenand_base.c:3284:2: note: here case ONENAND_DEVICE_DENSITY_2Gb: ^~~~ drivers/mtd/nand/onenand/onenand_base.c:3288:17: warning: this statement may fall through [-Wimplicit-fallthrough=] this->options |= ONENAND_HAS_UNLOCK_ALL; drivers/mtd/nand/onenand/onenand_base.c:3290:2: note: here case ONENAND_DEVICE_DENSITY_1Gb: ^~~~ Warning level 3 was used: -Wimplicit-fallthrough=3 Also, notice that this patch doesn't change any functionality. See the most recent thread of discussion here: https://lore.kernel.org/patchwork/patch/1077395/ This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. [1] https://lore.kernel.org/lkml/20190509085318.34a9d4be@xps13/ Cc: Miquel Raynal <miquel.raynal@bootlin.com> Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Suggested-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spinand: Add support for GigaDevice GD5F1GQ4UFxxGJeff Kletsky2019-06-271-15/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GigaDevice GD5F1GQ4UFxxG SPI NAND is in current production devices and, while it has the same logical layout as the E-series devices, it differs in the SPI interfacing in significant ways. This support is contingent on previous commits to: * Add support for two-byte device IDs * Define macros for page-read ops with three-byte addresses http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/ Signed-off-by: Jeff Kletsky <git-commits@allycomm.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spinand: Add support for two-byte device IDsJeff Kletsky2019-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | The GigaDevice GD5F1GQ4UFxxG SPI NAND utilizes two-byte device IDs. http://www.gigadevice.com/datasheet/gd5f1gq4xfxxg/ Signed-off-by: Jeff Kletsky <git-commits@allycomm.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: brcmnand: fallback to detected ecc-strength, ecc-step-sizeKamal Dasu2019-06-271-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change supports nand-ecc-step-size and nand-ecc-strength fields in brcmnand DT node to be optional. see: Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt If both nand-ecc-strength and nand-ecc-step-size are not specified in device tree node for NAND, raw NAND layer does detect ECC information by reading ONFI extended parameter page for parts using ONFI >= 2.1. In case of non-ONFI NAND parts there could be a nand_id table entry with ECC information. If there is valid device tree entry for nand-ecc-strength and nand-ecc-step-size fields it still shall override the detected values. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: Implement exec_opSascha Hauer2019-06-272-690/+440Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpmi driver performance suffers from NAND operations being split in multiple small DMA transfers. This has been forced by the NAND layer in the former days, but now with exec_op we can use the controller as intended. With this patch gpmi_nfc_exec_op becomes the main entry point to NAND operations. Here all instructions are collected and chained as separate DMA transfers. In the end whole chain is fired and waited to be finished. gpmi_nfc_exec_op only does the hardware operations, bad block marker swapping and buffer scrambling is done by the callers. It's worth noting that the nand_*_op functions always take the buffer lengths for the data that the NAND chip actually transfers. When doing BCH we have to calculate the net data size from the raw data size in some places. This patch has been tested with 2048/64 and 2048/128 byte NAND on i.MX6q. mtd_oobtest, mtd_subpagetest and mtd_speedtest run without errors. nandbiterrs, nandpagetest and nandsubpagetest userspace tests from mtdutils run without errors and UBIFS can successfully be mounted. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * dmaengine: mxs: rename custom flagSascha Hauer2019-06-271-6/+11
| | | | | | | | | | | | | | | | | | | | The mxs dma driver uses the flags parameter in dmaengine_prep_slave_sg() for custom flags, but still uses the dmaengine specific names of the flags. Do a little bit better and at least give the flag a custom name. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * dmaengine: mxs: Add header file to be shared with gpmi nand driverSascha Hauer2019-06-271-22/+14Star
| | | | | | | | | | | | | | | | | | | | | | | | | | The mxs dma driver can do PIO transfers. A pointer to the PIO words to transfer is passed in the struct scatterlist * argument of dmaengine_prep_slave_sg(). It's quite ugly and non obvious to cast u32 * to struct scatterlist * each time when calling dmaengine_prep_slave_sg(), so add a static inline wrapper function to be called by the user along with a description what is going on. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: drop unnecessary flagSascha Hauer2019-06-271-9/+5Star
| | | | | | | | | | | | | | | | | | The DMA_PREP_INTERRUPT flag is no longer needed by the mxs DMA driver, drop it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: use runtime PM to manage clocksSascha Hauer2019-06-271-25/+44
| | | | | | | | | | | | | | | | | | | | The gpmi driver aggressively en/disables the clocks between operations which has significant performance cost. Use runtime PM to get rid of this bottleneck. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: Drop unnecessary restoring of previous chipselectionSascha Hauer2019-06-271-14/+2Star
| | | | | | | | | | | | | | | | | | | | | | The i.MX23 specific option read code is called right after nand_scan. We can rely on the NAND core having disabled the chipselect, so there's no point in restoring the original chip select after NAND operations. Drop it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: remove unused parametersSascha Hauer2019-06-271-15/+19
| | | | | | | | | | | | | | | | | | | | | | gpmi_ecc_read_page_data uses the page parameter only for a debug printf, so we can drop the parameter and the debug printf. Moving the oob delivery from gpmi_ecc_read_page_data to gpmi_ecc_read_page makes the oob_required parameter unnecessary aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: read buf in nand_read_page_opSascha Hauer2019-06-271-8/+18
| | | | | | | | | | | | | | | | | | | | The driver calls nand_read_page_op without a buffer passed and then calls chip->legacy.read_buf to read the buffer afterwards which is the same as passing the buffer nand_read_page_op in the first place. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: Remove unnecessary variablesSascha Hauer2019-06-272-11/+6Star
| | | | | | | | | | | | | | | | | | | | this->page_buffer_virt and this->payload_virt are always set to the same value, so drop the former and just use the latter. Same for this->page_buffer_virt and this->payload_virt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: remove unused variableSascha Hauer2019-06-271-3/+0Star
| | | | | | | | | | | | | | | | | | The "private" member of struct gpmi_nand_data isn't used anywhere. Remove it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: gpmi: move all driver code into single fileSascha Hauer2019-06-274-1106/+1058Star
| | | | | | | | | | | | | | | | | | | | | | | | | | This moves the whole driver into a single C file. The filename gpmi-lib implies that it implements library functions, but in fact there are several cases where functions in gpmi-lib.c call back into functions in gpmi-nand.c. With this one has to constantly jump between those two files, so moving it into a single file improves readability, even when the file gets quite large. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: fsmc: Use nand_op_trace for operation tracingSascha Hauer2019-06-271-17/+2Star
| | | | | | | | | | | | | | | | | | Replace the different operation tracing functions with a call to nand_op_trace. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: export NAND operation tracerSascha Hauer2019-06-271-29/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | The NAND core has a NAND operation tracing function, but it can only be used by drivers using the generic option parser from the NAND core. Export the tracing function as a static inline function in rawnand.h so that drivers implementing exec_op directly do not have to write their own operation tracing. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: mtk: Fix wrongly assigned OOB buffer pointer issueXiaolei Li2019-06-271-11/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One main goal of the function mtk_nfc_update_ecc_stats is to check whether sectors are all empty. If they are empty, set these sectors's data buffer and OOB buffer as 0xff. But now, the sector OOB buffer pointer is wrongly assigned. We always do memset from sector 0. To fix this issue, pass start sector number to make OOB buffer pointer be properly assigned. Fixes: 1d6b1e464950 ("mtd: mediatek: driver for MTK Smart Device") Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: mtk: Add validity check for CE# pin settingXiaolei Li2019-06-271-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we only check how many CE# pins are set in device tree. But it should be necessary to check whether CE# pin setting is duplicated or if CE# pin index exceeds the maximum CE# number that controller supports. So, add validity check to avoid these invalid settings. Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: mtk: Improve data sampling timing for read cycleXiaolei Li2019-06-271-10/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we expand RE# low level time by choosing the max value between RE# pulse width and RE# access time, and sample data at the rising edge of RE#. Then, if RE# access time is bigger than RE# pulse width, the real read cycle time may be more than NAND SPEC required. This makes read performance be worse than that expected. This patch improves data sampling timing by calculating RE# low level time according to RE# pulse width. If RE# access time is bigger than RE# pulse width, then delay sampling data timing. The result of contrast test base on MT2712 evaluat board is as follow. nand: Micron MT29F16G08ADBCAH4 nand: 2048 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 224 NFI 2x clock rate: 124800000 HZ. Read speed without this patch: mtd_speedtest: page read speed is 14012 KiB/s mtd_speedtest: 2 page read speed is 14860 KiB/s Read speed with this patch: mtd_speedtest: page read speed is 18724 KiB/s mtd_speedtest: 2 page read speed is 18713 KiB/s Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: mtk: Correct low level time calculation of r/w cycleXiaolei Li2019-06-271-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present, the flow of calculating AC timing of read/write cycle in SDR mode is that: At first, calculate high hold time which is valid for both read and write cycle using the max value between tREH_min and tWH_min. Secondly, calculate WE# pulse width using tWP_min. Thridly, calculate RE# pulse width using the bigger one between tREA_max and tRP_min. But NAND SPEC shows that Controller should also meet write/read cycle time. That is write cycle time should be more than tWC_min and read cycle should be more than tRC_min. Obviously, we do not achieve that now. This patch corrects the low level time calculation to meet minimum read/write cycle time required. After getting the high hold time, WE# low level time will be promised to meet tWP_min and tWC_min requirement, and RE# low level time will be promised to meet tREA_max, tRP_min and tRC_min requirement. Fixes: edfee3619c49 ("mtd: nand: mtk: add ->setup_data_interface() hook") Cc: stable@vger.kernel.org # v4.17+ Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: brcmnand: Fix BCH ECC layout for large page NAND partsKamal Dasu2019-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | The way oobregion->offset is derived for large page NAND parts is wrong, fixes it. Fixes: ef5eeea6e911 ("mtd: nand: brcm: switch to mtd_ooblayout_ops") Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: onenand: Add support for 8Gb datasize onenandJonathan Bakker2019-06-271-0/+2
| | | | | | | | | | | | | | | | | | Used in several S5PV210-based Galaxy S devices, among them SGH-T959V, SGH-T959P, SGH-T839, and SPH-D700. Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: stm32_fmc2: manage the get_irq error caseFabien Dessenne2019-06-271-0/+6
| | | | | | | | | | | | | | | | During probe, check the "get_irq" error value. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: use longest matching patternStefan Agner2019-06-271-13/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes the exec_op parser does not choose the optimal pattern if multiple patterns with optional elements are available. Since the stack automatically splits operations in multiple exec_op calls, a non-optimal pattern gets broken up into multiple calls. E.g. an OOB read using the vf610 driver: nand: executing subop: nand: ->CMD [0x00] nand: ->ADDR [5 cyc: 00 08 ea 94 02] nand: ->CMD [0x30] nand: ->WAITRDY [max 200000 ms] nand: DATA_IN [64 B] nand: executing subop: nand: CMD [0x00] nand: ADDR [5 cyc: 00 08 ea 94 02] nand: CMD [0x30] nand: WAITRDY [max 200000 ms] nand: ->DATA_IN [64 B] However, the vf610 driver has a pattern which can execute the complete command in a single go... This patch makes sure that the longest matching pattern is chosen instead of the first (potentially only partial) match. With this change the vf610 reads the OOB in a single exec_op call: nand: executing subop: nand: ->CMD [0x00] nand: ->ADDR [5 cyc: 00 08 c0 1d 00] nand: ->CMD [0x30] nand: ->WAITRDY [max 200000 ms] nand: ->DATA_IN [64 B] Reported-by: Sascha Hauer <s.hauer@pengutronix.de> Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Tested-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | mtd: rawnand: sunxi: Add A23/A33 DMA support with extra MBUS configurationMiquel Raynal2019-07-051-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | Allwinner NAND controllers can make use of DMA to enhance the I/O throughput thanks to ECC pipelining. DMA handling with A23/A33 NAND IP is a bit different than with the older SoCs, hence the introduction of a new compatible to handle: * the differences between register offsets, * the burst length change from 4 to minimum 8, * manage SRAM accesses through MBUS with extra configuration. Fixes: c49836f05aa1 ("mtd: rawnand: sunxi: Add A23/A33 DMA support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | Revert "mtd: rawnand: sunxi: Add A23/A33 DMA support"Miquel Raynal2019-07-051-36/+2Star
| | | | | | | | | | | | | | | | | | | | This reverts commit c49836f05aa15282f7280e06ede3f6f8a6324833. The commit is wrong and its approach actually does not work. Let's revert it in order to add the feature with a clean patch. Fixes: c49836f05aa1 ("mtd: rawnand: sunxi: Add A23/A33 DMA support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | mtd: rawnand: ingenic: Fix ingenic_ecc dependencyPaul Cercueil2019-07-014-11/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If MTD_NAND_JZ4780 is y and MTD_NAND_JZ4780_BCH is m, which select CONFIG_MTD_NAND_INGENIC_ECC to m, building fails: drivers/mtd/nand/raw/ingenic/ingenic_nand.o: In function `ingenic_nand_remove': ingenic_nand.c:(.text+0x177): undefined reference to `ingenic_ecc_release' drivers/mtd/nand/raw/ingenic/ingenic_nand.o: In function `ingenic_nand_ecc_correct': ingenic_nand.c:(.text+0x2ee): undefined reference to `ingenic_ecc_correct' To fix that, the ingenic_nand and ingenic_ecc modules have been fused into one single module. - The ingenic_ecc.c code is now compiled in only if $(CONFIG_MTD_NAND_INGENIC_ECC) is set. This is now a boolean instead of tristate. - To avoid changing the module name, the ingenic_nand.c file is moved to ingenic_nand_drv.c. Then the module name is still ingenic_nand. - Since ingenic_ecc.c is no more a module, the module-specific macros have been dropped, and the functions are no more exported for use by the ingenic_nand driver. Fixes: 15de8c6efd0e ("mtd: rawnand: ingenic: Separate top-level and SoC specific code") Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reported-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Hulk Robot <hulkci@huawei.com> Cc: YueHaibing <yuehaibing@huawei.com> Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | mtd: spinand: Fix max_bad_eraseblocks_per_lun info in memorgFrieder Schrempf2019-07-012-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The 1Gb Macronix chip can have a maximum of 20 bad blocks, while the 2Gb version has twice as many blocks and therefore the maximum number of bad blocks is 40. The 4Gb GigaDevice GD5F4GQ4xA has twice as many blocks as its 2Gb counterpart and therefore a maximum of 80 bad blocks. Fixes: 377e517b5fa5 ("mtd: nand: Add max_bad_eraseblocks_per_lun info to memorg") Reported-by: Emil Lenngren <emil.lenngren@gmail.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | Merge tag 'mtd/fixes-for-5.2-rc7' of ↵Linus Torvalds2019-06-241-1/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd fixes from Miquel Raynal: - Set the raw NAND number of targets to the right value - Fix a bug uncovered by a recent patch on Spansion SPI-NOR flashes * tag 'mtd/fixes-for-5.2-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: mtd: spi-nor: use 16-bit WRR command when QE is set on spansion flashes mtd: rawnand: initialize ntargets with maxchips
| * | mtd: rawnand: initialize ntargets with maxchipsSascha Hauer2019-05-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memorg->ntargets is initialized with '1'. It should be initialized with the maxchips argument from nand_scan() instead. Otherwise multi chip support errors out on the secondary chip selects when trying to call nand_reset() on them: WARNING: CPU: 0 PID: 1 at drivers/mtd/nand/raw/internals.h:114 nand_reset_op+0x194/0x1c4 With this memorg->ntargets is initialized with the maximum number of chip selects supported by the driver. After having detected the number of actually connected chips memory->ntargets is updated with that number. Fixes: 32813e288414 ("mtd: rawnand: Get rid of chip->numchips") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-1927-121/+27Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 441Thomas Gleixner2019-06-051-5/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 315 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.503150771@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333Thomas Gleixner2019-06-051-13/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 136 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.384967451@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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