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* Merge branch 'for-5.0' of ↵Mark Brown2019-02-201-1/+1
|\ | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-5.1
| * spi: fix initial SPI_SR value in spi-fsl-dspiAngelo Dureghello2019-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ColdFire mcf54418, using DSPI_DMA_MODE mode, spi transfers at first boot stage are not succeding: m25p80 spi0.1: unrecognized JEDEC id bytes: 00, 00, 00 The reason is the SPI_SR initial value set by the driver, that is not clearing (not setting to 1) the RF_DF flag. After a tour on the dspi hw modules that use this driver(Vybrid, ColdFire and ls1021a) a better init value for SR register has been set. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Provide support for DSPI slave mode operation (Vybryd vf610)Lukasz Majewski2019-02-061-10/+30
|/ | | | | | | | | | | | | | | | | | The NXP's Vybryd vf610 can work as a SPI slave device (the CS and clock signals are provided by master). It is possible to specify a single device to work in that mode. As we do use DMA for transferring data, the RX channel must be prepared for incoming data. Moreover, in slave mode we just set a subset of control fields in configuration registers (CTAR0, PUSHR). For testing the spidev_test program has been used. Test script for this patch can be found here: https://github.com/lmajewski/tests-spi/blob/master/tests/spi/spi_tests.sh Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: use IRQF_SHARED mode to request IRQChuanhua Han2018-11-051-2/+2
| | | | | | | | | | Some SoC share one irq number between DSPI controllers. For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number. In this case, only one DSPI controller can register successfully, and others will fail. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: fix broken DSPI_EOQ_MODEAngelo Dureghello2018-08-281-0/+6
| | | | | | | | | | | | | | | This patch fixes the dspi_eoq_write function used by the ColdFire mcf5441x family. The 16 bit cmd part must be re-set at each data transfer. Also, now that fifo_size variables are used for eoq_read/write, a proper fifo size must be set (16 slots for the ColdFire dspi module version). Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Esben Haabendal <esben@haabendal.dk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: spi-fsl-dspi: Switch to SPDX identifierFabio Estevam2018-07-241-14/+6Star
| | | | | | | | Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Fill actual_length when doing DMA transferAndrey Smirnov2018-07-171-2/+5
| | | | | | | | | | | | | | | | | Upper layer users of SPI device drivers may rely on 'actual_length', so it is important that information is correctly reported. One such example is spi_mem_exec_op() function that will fail if 'actual_length' of the data transferred is not what was requested. Add necessary code to populate 'actual_length. Cc: Mark Brown <broonie@kernel.org> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: cphealy@gmail.com Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Fix imprecise abort on VF500 during probeKrzysztof Kozlowski2018-07-021-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Registers of DSPI should not be accessed before enabling its clock. On Toradex Colibri VF50 on Iris carrier board this could be seen during bootup as imprecise abort: Unhandled fault: imprecise external abort (0x1c06) at 0x00000000 Internal error: : 1c06 [#1] ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.14.39-dirty #97 Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) Backtrace: [<804166a8>] (regmap_write) from [<80466b5c>] (dspi_probe+0x1f0/0x8dc) [<8046696c>] (dspi_probe) from [<8040107c>] (platform_drv_probe+0x54/0xb8) [<80401028>] (platform_drv_probe) from [<803ff53c>] (driver_probe_device+0x280/0x2f8) [<803ff2bc>] (driver_probe_device) from [<803ff674>] (__driver_attach+0xc0/0xc4) [<803ff5b4>] (__driver_attach) from [<803fd818>] (bus_for_each_dev+0x70/0xa4) [<803fd7a8>] (bus_for_each_dev) from [<803fee74>] (driver_attach+0x24/0x28) [<803fee50>] (driver_attach) from [<803fe980>] (bus_add_driver+0x1a0/0x218) [<803fe7e0>] (bus_add_driver) from [<803fffe8>] (driver_register+0x80/0x100) [<803fff68>] (driver_register) from [<80400fdc>] (__platform_driver_register+0x48/0x50) [<80400f94>] (__platform_driver_register) from [<8091cf7c>] (fsl_dspi_driver_init+0x1c/0x20) [<8091cf60>] (fsl_dspi_driver_init) from [<8010195c>] (do_one_initcall+0x4c/0x174) [<80101910>] (do_one_initcall) from [<80900e8c>] (kernel_init_freeable+0x144/0x1d8) [<80900d48>] (kernel_init_freeable) from [<805ff6a8>] (kernel_init+0x10/0x114) [<805ff698>] (kernel_init) from [<80107be8>] (ret_from_fork+0x14/0x2c) Cc: <stable@vger.kernel.org> Fixes: 5ee67b587a2b ("spi: dspi: clear SPI_SR before enable interrupt") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Fix copy-paste error in dspi_probeGustavo A. R. Silva2018-06-211-1/+1
| | | | | | | | | | | It seems that the proper structure field to use in this particular case is *regmap_pushr* instead of regmap. Addresses-Coverity-ID: 1470126 ("Copy-paste error") Fixes: 58ba07ec79e6 ("spi: spi-fsl-dspi: Add support for XSPI mode registers") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Esben Haabendal <eha@deif.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Enable extended SPI modeEsben Haabendal2018-06-201-1/+3
| | | | | | | | | | Set the XSPI bit for devices configured for XSPI mode (currently LS1021A), and thereby switch to extended SPI mode, allowing for SPI transfers using from 4 to 32 bits per word instead of 4 to 16 bits per word. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Advertise 32 bit for XSPI modeEsben Haabendal2018-06-201-1/+5
| | | | | | Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: XSPI FIFO handling (in TCFQ mode)Esben Haabendal2018-06-201-7/+48
| | | | | | | | | | | | | This implements handling of split CMD and TX FIFO queues for XSPI when running in TCFQ mode. It should be simple to add it to EOQ mode also. Currently, EOQ mode is only used with coldfire. So if coldfire DSPI supports XSPI, XSPI FIFO handling should be added to EOQ mode also. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Framesize control for XSPI modeEsben Haabendal2018-06-201-0/+10
| | | | | | Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Add support for XSPI mode registersEsben Haabendal2018-06-201-2/+61
| | | | | | | | | | | | | This prepares for adding support for extended SPI mode (XSPI), by extending the regmap with the extra SREX and CTAREx registers. An additional register map is made for allowing 16 bit access to CMD and TX FIFO of the PUSHR register separately, which is also needed for XSPI mode support. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'spi-4.18' into spi-4.19 for DSPI depMark Brown2018-06-201-0/+12
|\
| * spi: spi-fsl-dspi: Fixup regmap configurationEsben Haabendal2018-06-201-0/+12
| | | | | | | | | | | | | | | | | | | | Mark volatile registers to avoid caching bugs. Note: SPI_MCR is marked volatile because of CLR_TXF and CLR_RXF bits. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Fix MCR register handlingEsben Haabendal2018-06-201-7/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | The MCR register is not changed, so initialize it in dspi_init(). The exception is the CLR_TXF and CLR_RXF bits, which should be written to before each transfer to make sure we start with empty FIFOs. With MCR register now configured as volatile, the regmap_update_bits will do a real read-modify-write cycle. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Support 4 to 16 bits per word transfersEsben Haabendal2018-06-201-163/+88Star
| | | | | | | | | | | | | | | | | | | | This extends the driver with support for all SPI framesizes from 4 to 16 bits, and adds support for per transfer specific bits_per_word, while at the same time reducing code size and complexity. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Simplify transfer counter handlingEsben Haabendal2018-06-201-25/+14Star
| | | | | | | | | | | | | | | | | | Simplify driver by avoiding counter wrapping by clearing transfer counter on first SPI transfer per interrupt instead of tracking what it was before. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Fix per transfer cs_change handlingEsben Haabendal2018-06-201-28/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of 92dc20d83adec565378254c0630e839ff5674e14, transfer->cs_change has been supported for non-last transfers, but not for last transfer. This change brings handling of cs_change in line with the specification in spi.h, implementing handling of transfer->cs_change for all transfers. The value for CMD FIFO is precalculated with transfer->cs_change field taken into account, allowing for CS de-activate between transfers and keeping CS activated after last transfer. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Drop unneeded use of dataflags bitsEsben Haabendal2018-06-201-15/+8Star
| | | | | | | | | | | | | | | | | | Checking directly against pointer value should be at least as fast as doing bitmasking and compare, so let's keep it simple. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: spi-fsl-dspi: Drop unreachable else if statementEsben Haabendal2018-06-201-2/+1Star
|/ | | | | | | | | The if statement just above this if/else statement triggers on the same condition, and then invalidates it. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: account for const type of of_device_id.dataJulia Lawall2018-01-031-4/+3Star
| | | | | | | | | | | | | | This driver creates a number of const structures that it stores in the data field of an of_device_id array. The data field of an of_device_id structure has type const void *, so there is no need for a const-discarding cast when putting const values into such a structure. Done using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: add SPI_LSB_FIRST to driver capabilitiesKurt Kanzenbach2017-11-161-1/+1
| | | | | | | | | | The driver as well as the controller support the SPI lsb first mode. However, it's not possible to configure it e.g. when using spidev. Adding this flag to mode_bits resolves the issue and lsb first mode can be used. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: enabling Coldfire mcf5441x dspiAngelo Dureghello2017-11-031-21/+45
| | | | | Signed-off-by: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: ensure non-zero return on error pathNikita Yushchenko2017-05-221-1/+2
| | | | | | | | Propagate error return from dspi_request_dma() into probe routine's return. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Fix error handlingChristophe JAILLET2017-02-191-1/+2
| | | | | | | | According to error handling in this function, it is likely that going to 'out_master_put' was expected here. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/delay', 'spi/topic/dw', ↵Mark Brown2016-12-121-4/+302
|\ \ | | | | | | | | | 'spi/topic/fsl-dspi' and 'spi/topic/fsl-espi' into spi-next
| | * spi: spi-fsl-dspi: Fix continuous selection formatSanchayan Maity2016-11-221-14/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current DMA implementation was not handling the continuous selection format viz. SPI chip select would be deasserted even between sequential serial transfers. Use existing dspi_data_to_pushr function to restructure the transmit code path and set or reset the CONT bit on same lines as code path in EOQ mode does. This correctly implements continuous selection format while also correcting and cleaning up the transmit code path. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: spi-fsl-dspi: Fix incorrect DMA setupSanchayan Maity2016-11-221-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently dmaengine_prep_slave_single was being called with length set to the complete DMA buffer size. This resulted in unwanted bytes being transferred to the SPI register leading to clock and MOSI lines having unwanted data even after chip select got deasserted and the required bytes having been transferred. While at it also clean up the use of curr_xfer_len which is central to the DMA setup, from bytes to DMA transfers for every use. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: spi-fsl-dspi: Fix incorrect freeing of DMA allocated buffersSanchayan Maity2016-11-221-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Buffers allocated with a call to dma_alloc_coherent should be freed with dma_free_coherent instead of the currently used devm_kfree. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: spi-fsl-dspi: Fix SPI transfer issue when using multiple SPI_IOC_MESSAGESanchayan Maity2016-11-181-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current DMA implementation had a bug where the DMA transfer would exit the loop in dspi_transfer_one_message after the completion of a single transfer. This results in a multi message transfer submitted with SPI_IOC_MESSAGE to terminate incorrectly without an error. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: spi-fsl-dspi: Add DMA support for VybridSanchayan Maity2016-11-111-1/+300
| |/ | | | | | | | | | | | | Add DMA support for Vybrid. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* / spi: dspi: clear SPI_SR before enable interruptYuan Yao2016-10-291-0/+7
|/ | | | | | | | | Once dspi is used in uboot, the SPI_SR have been set by some value. At this time, if kernel enable the interrupt before clear the status flag, that will trigger the wrong interrupt. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Drop extra spi_master_put in device remove functionWei Yongjun2016-08-221-1/+0Star
| | | | | | | | | | | The call sequence spi_alloc_master/spi_register_master/spi_unregister_master is complete; it reduces the device reference count to zero, which and results in device memory being freed. The subsequent call to spi_master_put is unnecessary and results in an access to free memory. Drop it. Fixes: 9298bc727385 ("spi: spi-fsl-dspi: Remove spi-bitbang") Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Check clk_prepare_enable() errorFabio Estevam2016-08-221-2/+7
| | | | | | | | clk_prepare_enable() may fail, so we should better check its return value and propagate it in the case of failure. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: fix a possible NULL dereferenceLABBE Corentin2016-08-161-3/+1Star
| | | | | | | | | | | | | of_match_device could return NULL, and so cause a NULL pointer dereference later. For fixing this problem, we use of_device_get_match_data(), this will simplify the code a little by using a standard function for getting the match data. Reported-by: coverity (CID 1324129) Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: constify devtype_dataLABBE Corentin2016-08-161-2/+2
| | | | | | | | of_id->data is const, so instead of casting the pointer to drop its const status, this patch constify the devtype_data pointer. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/flash-read', ↵Mark Brown2016-05-231-0/+7
|\ \ | | | | | | | | | 'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/kconfig' into spi-next
| | * spi: fsl-dspi: Set max_speed_hz for masterBhuvanchandra DV2016-03-231-0/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | Calculate and update max speed from bus clock for SoCs using DSPI IP. The bus clock factor's are taken from the data sheets of respective SoCs. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
* / spi: spi-fsl-dspi: Fix cs_change handling in message transferAndrey Vostrikov2016-04-051-2/+2
|/ | | | | | | | | There are use cases when chip select should be triggered between transfers in single SPI message. Current implementation does this only on last transfer in message ignoring cs_change value provided in current transfer. Signed-off-by: Andrey Vostrikov <andrey.vostrikov@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi-fsl-dspi: Fix CTAR Register accessBhuvanchandra DV2015-12-121-6/+6
| | | | | | | | | | | | | | | | | DSPI instances in Vybrid have a different amount of chip selects and CTARs (Clock and transfer Attributes Register). In case of DSPI1 we only have 2 CTAR registers and 4 CS. In present driver implementation CTAR offset is derived from CS instance which will lead to out of bound access if chip select instance is greater than CTAR register instance, hence use single CTAR0 register for all CS instances. Since we write the CTAR register anyway before each access, there is no value in using the additional CTAR registers. Also one should not program a value in CTAS for a CTAR register that is not present, hence configure CTAS to use CTAR0. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Remove duplicated register writeJarkko Nikula2015-09-171-3/+0Star
| | | | | | | | | | | | SPI core makes sure that transfer speed is always set so code here writes the same register with the same value twice. Code has been doing this from the beginning. This looks to me some sort of copy paste error so I'm removing the second write. If this is not the case we can bring it back with a comment. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-dspi: Use pinctrl PM helpersMirza Krak2015-06-121-0/+5
| | | | | | | Add support for "sleep" state of pinctrl. Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Change the way of increasing spi_message->actual_lengthHaikun Wang2015-06-091-33/+68
| | | | | | | | | | | | | | | | | | | | | | | In current driver, we increase actual_length in the following way: message->actual_length += dspi_xxx_transfer() It has two defects. First, transmitting maybe in process when the function call finished and we don't know the transmitting result in this moment. Secondly, the last sentence in function before returning is accessing the SPI register and trigger the data transmitting. If we enable interrupt, interrupt may be generated before function return and we also have the same sentence "message->actual_length += dspi_xxx_transfer()" in the IRQ handler. And usually dspi_xxx_transfer will trigger a new IRQ. The original dspi_xxx_transfer call may return when no new IRQ generate. This may mess the variable spi_message->actual_length. Now we increase the variable in the IRQ handler and only when we get the TCF or EOQ interrupt And we get the transmitted data length from the SPI transfer counter instead of the function return value. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-dspi: Enable TCF interrupt mode supportHaikun Wang2015-06-091-76/+169
| | | | | | | | | | | | | DSPI module has two optional interrupts when complete data transfer. One is EOQ interrupt, the other one is TCF interrupt. EOQ indicates a queue of data frame has been transmitted. TCF indicates a frame has been transmitted. This patch enable support TCF mode. Driver binds a correct interrupt mode to every compatible string. User should use the correct compatible string in the dts node. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'fix/fsl-dspi' of ↵Mark Brown2015-06-091-18/+83
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi
| * spi: spi-fsl-dspi: Bug fix incorrect CS de-assertHaikun Wang2015-05-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI chip select signal need to keep asserted between several spi_transfer in the same spi_message usually. But the driver will de-assert CS signal and the assert it between serval spi_transfer in the same spi_message under some condiations. This patch fix the bug. Here is an example: Assume you have two variables like the following, struct spi_transfer a; struct spi_transfer b; if you send a spi_message only includes 'a' first, and then you send a spi_message includes 'a' and 'b' but without resetting 'a'. Driver will de-assert CS and then assert CS between 'a' and 'b'. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * Merge branch 'fix/fsl-dspi' of ↵Mark Brown2015-04-071-0/+2
| |\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi Conflicts: drivers/spi/spi-fsl-dspi.c
| | * spi: fsl-dspi: Fix clock rate scale valuesAaron Brice2015-04-061-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous algorithm had an outer loop with the values {2,3,5,7} and an inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first value over the required scaling value (where the total scale was the two numbers multiplied). Since the inner loop went up to 32768 it would always pick a value of 2 for PBR and a much higher than necessary value for BR. The desired scale factor was being divided by two I believe to compensate for the much higher scale factors (the divide by two not specified in the reference manual). Updated to check all values and find the smallest scale factor possible without going over the desired clock rate. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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