openslx/kernel-qcow2-linux.git - In-kernel qcow2 (Kernel part)

	Commit message (Expand)	Author	Age	Files	Lines
*	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle	2008-10-11	1	-219/+0
*	[MIPS] Fix use of smp_processor_id() in preemptible code.	Pavel Kiryukhin	2007-12-01	1	-3/+3
*	[MIPS] Allow hardwiring of the CPU type to a single type for optimization.	Ralf Baechle	2007-10-12	1	-1/+4
*	[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.	Ralf Baechle	2007-10-12	1	-3/+0
*	[MIPS] Enable support for the userlocal hardware register	Ralf Baechle	2007-07-10	1	-0/+4
*	[MIPS] FPU ownership management & preemption fixes	Atsushi Nemoto	2007-03-17	1	-0/+3
*	[MIPS] Use the proper technical term for naming some of the cache macros.	Ralf Baechle	2006-07-13	1	-2/+2
*	[MIPS] Default cpu_has_mipsmt to a runtime check	Chris Dearman	2006-07-13	1	-5/+1
*	[MIPS] Fix configuration of R2 CPU features and multithreading.	Ralf Baechle	2006-06-29	1	-12/+8
*	Don't include linux/config.h from anywhere else in include/	David Woodhouse	2006-04-26	1	-1/+0
*	[MIPS] FPU affinity for MT ASE.	Ralf Baechle	2006-04-19	1	-1/+1
*	[MIPS] local_r4k_flush_cache_page fix	Atsushi Nemoto	2006-03-18	1	-0/+3
*	MIPS: Reorganize ISA constants strictly as bitmasks.	Ralf Baechle	2006-01-10	1	-24/+21
*	MIPS: Introduce machinery for testing for MIPSxxR1/2.	Ralf Baechle	2006-01-10	1	-0/+24
*	Cleanup the mess in cpu_cache_init.	Ralf Baechle	2005-10-29	1	-2/+13
*	Detect the MIPS R2 vectored interrupt, external interrupt controller	Ralf Baechle	2005-10-29	1	-0/+24
*	Redo RM9000 workaround which along with other DSP ASE changes was	Ralf Baechle	2005-10-29	1	-11/+0
*	Support the MIPS32 / MIPS64 DSP ASE.	Ralf Baechle	2005-10-29	1	-0/+4
*	Cleanup decoding of MIPSxx config registers.	Ralf Baechle	2005-10-29	1	-3/+13
*	[PATCH] mips: clean up 32/64-bit configuration	Ralf Baechle	2005-09-05	1	-2/+2
*	Linux-2.6.12-rc2	Linus Torvalds	2005-04-17	1	-0/+159