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path: root/arch/arm/boot/dts/exynos5250-smdk5250.dts
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// SPDX-License-Identifier: GPL-2.0
/*
 * SAMSUNG SMDK5250 board device tree source
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "exynos5250.dtsi"

/ {
	model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
	compatible = "samsung,smdk5250", "samsung,exynos5250", "samsung,exynos5";

	aliases {
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0x80000000>;
	};

	chosen {
		bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
	};

	vdd: fixed-regulator-vdd {
		compatible = "regulator-fixed";
		regulator-name = "vdd-supply";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

	dbvdd: fixed-regulator-dbvdd {
		compatible = "regulator-fixed";
		regulator-name = "dbvdd-supply";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	spkvdd: fixed-regulator-spkvdd {
		compatible = "regulator-fixed";
		regulator-name = "spkvdd-supply";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	sound {
		compatible = "samsung,smdk-wm8994";

		samsung,i2s-controller = <&i2s0>;
		samsung,audio-codec = <&wm8994>;
	};

	fixed-rate-clocks {
		xxti {
			compatible = "samsung,clock-xxti";
			clock-frequency = <24000000>;
		};

		codec_mclk: codec-mclk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <16934000>;
		};
	};
};

&cpu0 {
	cpu0-supply = <&buck2_reg>;
};

&dp {
	samsung,color-space = <0>;
	samsung,color-depth = <1>;
	samsung,link-rate = <0x0a>;
	samsung,lane-count = <4>;

	pinctrl-names = "default";
	pinctrl-0 = <&dp_hpd>;
	status = "okay";

	display-timings {
		native-mode = <&timing0>;

		timing0: timing {
			/* 1280x800 */
			clock-frequency = <50000>;
			hactive = <1280>;
			vactive = <800>;
			hfront-porch = <4>;
			hback-porch = <4>;
			hsync-len = <4>;
			vback-porch = <4>;
			vfront-porch = <4>;
			vsync-len = <4>;
		};
	};
};

&ehci {
	samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
};

&fimd {
	status = "okay";
};

&hdmi {
	status = "okay";
	ddc = <&i2c_2>;
	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
};

&i2c_0 {
	status = "okay";
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <20000>;

	eeprom@50 {
		compatible = "samsung,s524ad0xd1";
		reg = <0x50>;
	};

	max77686@9 {
		compatible = "maxim,max77686";
		reg = <0x09>;
		interrupt-parent = <&gpx3>;
		interrupts = <2 IRQ_TYPE_NONE>;
		pinctrl-names = "default";
		pinctrl-0 = <&max77686_irq>;
		wakeup-source;

		voltage-regulators {
			ldo1_reg: LDO1 {
				regulator-name = "P1.0V_LDO_OUT1";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
				regulator-always-on;
			};

			ldo2_reg: LDO2 {
				regulator-name = "P1.2V_LDO_OUT2";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
			};

			ldo3_reg: LDO3 {
				regulator-name = "P1.8V_LDO_OUT3";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo4_reg: LDO4 {
				regulator-name = "P2.8V_LDO_OUT4";
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
			};

			ldo5_reg: LDO5 {
				regulator-name = "P1.8V_LDO_OUT5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo6_reg: LDO6 {
				regulator-name = "P1.1V_LDO_OUT6";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
				regulator-always-on;
			};

			ldo7_reg: LDO7 {
				regulator-name = "P1.1V_LDO_OUT7";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
				regulator-always-on;
			};

			ldo8_reg: LDO8 {
				regulator-name = "P1.0V_LDO_OUT8";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
			};

			ldo10_reg: LDO10 {
				regulator-name = "P1.8V_LDO_OUT10";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			ldo11_reg: LDO11 {
				regulator-name = "P1.8V_LDO_OUT11";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo12_reg: LDO12 {
				regulator-name = "P3.0V_LDO_OUT12";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3000000>;
			};

			ldo13_reg: LDO13 {
				regulator-name = "P1.8V_LDO_OUT13";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo14_reg: LDO14 {
				regulator-name = "P1.8V_LDO_OUT14";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo15_reg: LDO15 {
				regulator-name = "P1.0V_LDO_OUT15";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
			};

			ldo16_reg: LDO16 {
				regulator-name = "P1.8V_LDO_OUT16";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};

			buck1_reg: BUCK1 {
				regulator-name = "vdd_mif";
				regulator-min-microvolt = <950000>;
				regulator-max-microvolt = <1300000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck2_reg: BUCK2 {
				regulator-name = "vdd_arm";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck3_reg: BUCK3 {
				regulator-name = "vdd_int";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck4_reg: BUCK4 {
				regulator-name = "vdd_g3d";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <1300000>;
				regulator-always-on;
				regulator-boot-on;
			};

			buck5_reg: BUCK5 {
				regulator-name = "P1.8V_BUCK_OUT5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				regulator-boot-on;
			};
		};
	};
};

&i2c_1 {
	status = "okay";
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <20000>;

	eeprom@51 {
		compatible = "samsung,s524ad0xd1";
		reg = <0x51>;
	};

	wm8994: wm8994@1a {
		compatible = "wlf,wm8994";
		reg = <0x1a>;

		gpio-controller;
		#gpio-cells = <2>;

		clocks = <&codec_mclk>;
		clock-names = "MCLK1";

		AVDD2-supply = <&vdd>;
		CPVDD-supply = <&vdd>;
		DBVDD-supply = <&dbvdd>;
		SPKVDD1-supply = <&spkvdd>;
		SPKVDD2-supply = <&spkvdd>;
	};
};

&i2c_2 {
	status = "okay";
	/* used by HDMI DDC */
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <66000>;
};

&i2c_8 {
	status = "okay";
	/* used by HDMI PHY */
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <66000>;
};

&i2c_9 {
	status = "okay";
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <40000>;
	samsung,i2c-slave-addr = <0x38>;

	sata_phy_i2c: sata-phy@38 {
		compatible = "samsung,exynos-sataphy-i2c";
		reg = <0x38>;
	};
};

&i2s0 {
	status = "okay";
};

&mixer {
	status = "okay";
};

&mmc_0 {
	status = "okay";
	broken-cd;
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <2 3>;
	samsung,dw-mshc-ddr-timing = <1 2>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
	bus-width = <8>;
	cap-mmc-highspeed;
};

&mmc_2 {
	status = "okay";
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <2 3>;
	samsung,dw-mshc-ddr-timing = <1 2>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
	bus-width = <4>;
	disable-wp;
	cap-sd-highspeed;
};

&rtc {
	status = "okay";
};

&sata {
	status = "okay";
};

&sata_phy {
	status = "okay";
	samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};

&spi_1 {
	status = "okay";
	cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;

	w25q80bw@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "w25x80";
		reg = <0>;
		spi-max-frequency = <1000000>;

		controller-data {
			samsung,spi-feedback-delay = <0>;
		};

		partition@0 {
			label = "U-Boot";
			reg = <0x0 0x40000>;
			read-only;
		};

		partition@40000 {
			label = "Kernel";
			reg = <0x40000 0xc0000>;
		};
	};
};

&pinctrl_0 {
	max77686_irq: max77686-irq {
		samsung,pins = "gpx3-2";
		samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
	};
};
s="hl opt">); if (err) return err; for (; !err && cmd_len; command++, cmd_len--) { if (*command >= MSGESC) { err = serio_write(serio, MSGESC); if (!err) err = serio_write(serio, *command - MSGOFFSET); } else { err = serio_write(serio, *command); } } if (!err) err = serio_write(serio, MSGEND); return err; } static int pulse8_send_and_wait_once(struct pulse8 *pulse8, const u8 *cmd, u8 cmd_len, u8 response, u8 size) { int err; /*dev_info(pulse8->dev, "transmit: %*ph\n", cmd_len, cmd);*/ init_completion(&pulse8->cmd_done); err = pulse8_send(pulse8->serio, cmd, cmd_len); if (err) return err; if (!wait_for_completion_timeout(&pulse8->cmd_done, HZ)) return -ETIMEDOUT; if ((pulse8->data[0] & 0x3f) == MSGCODE_COMMAND_REJECTED && cmd[0] != MSGCODE_SET_CONTROLLED && cmd[0] != MSGCODE_SET_AUTO_ENABLED && cmd[0] != MSGCODE_GET_BUILDDATE) return -ENOTTY; if (response && ((pulse8->data[0] & 0x3f) != response || pulse8->len < size + 1)) { dev_info(pulse8->dev, "transmit: failed %02x\n", pulse8->data[0] & 0x3f); return -EIO; } return 0; } static int pulse8_send_and_wait(struct pulse8 *pulse8, const u8 *cmd, u8 cmd_len, u8 response, u8 size) { u8 cmd_sc[2]; int err; mutex_lock(&pulse8->write_lock); err = pulse8_send_and_wait_once(pulse8, cmd, cmd_len, response, size); if (err == -ENOTTY) { cmd_sc[0] = MSGCODE_SET_CONTROLLED; cmd_sc[1] = 1; err = pulse8_send_and_wait_once(pulse8, cmd_sc, 2, MSGCODE_COMMAND_ACCEPTED, 1); if (err) goto unlock; err = pulse8_send_and_wait_once(pulse8, cmd, cmd_len, response, size); } unlock: mutex_unlock(&pulse8->write_lock); return err == -ENOTTY ? -EIO : err; } static int pulse8_setup(struct pulse8 *pulse8, struct serio *serio, struct cec_log_addrs *log_addrs, u16 *pa) { u8 *data = pulse8->data + 1; u8 cmd[2]; int err; struct tm tm; time64_t date; pulse8->vers = 0; cmd[0] = MSGCODE_FIRMWARE_VERSION; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 2); if (err) return err; pulse8->vers = (data[0] << 8) | data[1]; dev_info(pulse8->dev, "Firmware version %04x\n", pulse8->vers); if (pulse8->vers < 2) { *pa = CEC_PHYS_ADDR_INVALID; return 0; } cmd[0] = MSGCODE_GET_BUILDDATE; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 4); if (err) return err; date = (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]; time64_to_tm(date, 0, &tm); dev_info(pulse8->dev, "Firmware build date %04ld.%02d.%02d %02d:%02d:%02d\n", tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); dev_dbg(pulse8->dev, "Persistent config:\n"); cmd[0] = MSGCODE_GET_AUTO_ENABLED; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); if (err) return err; pulse8->autonomous = data[0]; dev_dbg(pulse8->dev, "Autonomous mode: %s", data[0] ? "on" : "off"); cmd[0] = MSGCODE_GET_DEVICE_TYPE; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); if (err) return err; log_addrs->primary_device_type[0] = data[0]; dev_dbg(pulse8->dev, "Primary device type: %d\n", data[0]); switch (log_addrs->primary_device_type[0]) { case CEC_OP_PRIM_DEVTYPE_TV: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_TV; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_TV; break; case CEC_OP_PRIM_DEVTYPE_RECORD: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_RECORD; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_RECORD; break; case CEC_OP_PRIM_DEVTYPE_TUNER: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_TUNER; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_TUNER; break; case CEC_OP_PRIM_DEVTYPE_PLAYBACK: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_PLAYBACK; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_PLAYBACK; break; case CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_PLAYBACK; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_AUDIOSYSTEM; break; case CEC_OP_PRIM_DEVTYPE_SWITCH: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_UNREGISTERED; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_SWITCH; break; case CEC_OP_PRIM_DEVTYPE_PROCESSOR: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_SPECIFIC; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_SWITCH; break; default: log_addrs->log_addr_type[0] = CEC_LOG_ADDR_TYPE_UNREGISTERED; log_addrs->all_device_types[0] = CEC_OP_ALL_DEVTYPE_SWITCH; dev_info(pulse8->dev, "Unknown Primary Device Type: %d\n", log_addrs->primary_device_type[0]); break; } cmd[0] = MSGCODE_GET_LOGICAL_ADDRESS_MASK; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 2); if (err) return err; log_addrs->log_addr_mask = (data[0] << 8) | data[1]; dev_dbg(pulse8->dev, "Logical address ACK mask: %x\n", log_addrs->log_addr_mask); if (log_addrs->log_addr_mask) log_addrs->num_log_addrs = 1; cmd[0] = MSGCODE_GET_PHYSICAL_ADDRESS; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); if (err) return err; *pa = (data[0] << 8) | data[1]; dev_dbg(pulse8->dev, "Physical address: %x.%x.%x.%x\n", cec_phys_addr_exp(*pa)); cmd[0] = MSGCODE_GET_HDMI_VERSION; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 1); if (err) return err; log_addrs->cec_version = data[0]; dev_dbg(pulse8->dev, "CEC version: %d\n", log_addrs->cec_version); cmd[0] = MSGCODE_GET_OSD_NAME; err = pulse8_send_and_wait(pulse8, cmd, 1, cmd[0], 0); if (err) return err; strncpy(log_addrs->osd_name, data, 13); dev_dbg(pulse8->dev, "OSD name: %s\n", log_addrs->osd_name); return 0; } static int pulse8_apply_persistent_config(struct pulse8 *pulse8, struct cec_log_addrs *log_addrs, u16 pa) { int err; err = cec_s_log_addrs(pulse8->adap, log_addrs, false); if (err) return err; cec_s_phys_addr(pulse8->adap, pa, false); return 0; } static int pulse8_cec_adap_enable(struct cec_adapter *adap, bool enable) { struct pulse8 *pulse8 = cec_get_drvdata(adap); u8 cmd[16]; int err; cmd[0] = MSGCODE_SET_CONTROLLED; cmd[1] = enable; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 1); return enable ? err : 0; } static int pulse8_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr) { struct pulse8 *pulse8 = cec_get_drvdata(adap); u16 mask = 0; u16 pa = adap->phys_addr; u8 cmd[16]; int err = 0; mutex_lock(&pulse8->config_lock); if (log_addr != CEC_LOG_ADDR_INVALID) mask = 1 << log_addr; cmd[0] = MSGCODE_SET_ACK_MASK; cmd[1] = mask >> 8; cmd[2] = mask & 0xff; err = pulse8_send_and_wait(pulse8, cmd, 3, MSGCODE_COMMAND_ACCEPTED, 0); if ((err && mask != 0) || pulse8->restoring_config) goto unlock; cmd[0] = MSGCODE_SET_AUTO_ENABLED; cmd[1] = log_addr == CEC_LOG_ADDR_INVALID ? 0 : 1; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; pulse8->autonomous = cmd[1]; if (log_addr == CEC_LOG_ADDR_INVALID) goto unlock; cmd[0] = MSGCODE_SET_DEVICE_TYPE; cmd[1] = adap->log_addrs.primary_device_type[0]; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; switch (adap->log_addrs.primary_device_type[0]) { case CEC_OP_PRIM_DEVTYPE_TV: mask = CEC_LOG_ADDR_MASK_TV; break; case CEC_OP_PRIM_DEVTYPE_RECORD: mask = CEC_LOG_ADDR_MASK_RECORD; break; case CEC_OP_PRIM_DEVTYPE_TUNER: mask = CEC_LOG_ADDR_MASK_TUNER; break; case CEC_OP_PRIM_DEVTYPE_PLAYBACK: mask = CEC_LOG_ADDR_MASK_PLAYBACK; break; case CEC_OP_PRIM_DEVTYPE_AUDIOSYSTEM: mask = CEC_LOG_ADDR_MASK_AUDIOSYSTEM; break; case CEC_OP_PRIM_DEVTYPE_SWITCH: mask = CEC_LOG_ADDR_MASK_UNREGISTERED; break; case CEC_OP_PRIM_DEVTYPE_PROCESSOR: mask = CEC_LOG_ADDR_MASK_SPECIFIC; break; default: mask = 0; break; } cmd[0] = MSGCODE_SET_LOGICAL_ADDRESS_MASK; cmd[1] = mask >> 8; cmd[2] = mask & 0xff; err = pulse8_send_and_wait(pulse8, cmd, 3, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; cmd[0] = MSGCODE_SET_DEFAULT_LOGICAL_ADDRESS; cmd[1] = log_addr; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; cmd[0] = MSGCODE_SET_PHYSICAL_ADDRESS; cmd[1] = pa >> 8; cmd[2] = pa & 0xff; err = pulse8_send_and_wait(pulse8, cmd, 3, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; cmd[0] = MSGCODE_SET_HDMI_VERSION; cmd[1] = adap->log_addrs.cec_version; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; if (adap->log_addrs.osd_name[0]) { size_t osd_len = strlen(adap->log_addrs.osd_name); char *osd_str = cmd + 1; cmd[0] = MSGCODE_SET_OSD_NAME; strncpy(cmd + 1, adap->log_addrs.osd_name, 13); if (osd_len < 4) { memset(osd_str + osd_len, ' ', 4 - osd_len); osd_len = 4; osd_str[osd_len] = '\0'; strscpy(adap->log_addrs.osd_name, osd_str, sizeof(adap->log_addrs.osd_name)); } err = pulse8_send_and_wait(pulse8, cmd, 1 + osd_len, MSGCODE_COMMAND_ACCEPTED, 0); if (err) goto unlock; } unlock: if (pulse8->restoring_config) pulse8->restoring_config = false; else pulse8->config_pending = true; mutex_unlock(&pulse8->config_lock); return log_addr == CEC_LOG_ADDR_INVALID ? 0 : err; } static int pulse8_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, u32 signal_free_time, struct cec_msg *msg) { struct pulse8 *pulse8 = cec_get_drvdata(adap); u8 cmd[2]; unsigned int i; int err; cmd[0] = MSGCODE_TRANSMIT_IDLETIME; cmd[1] = signal_free_time; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 1); cmd[0] = MSGCODE_TRANSMIT_ACK_POLARITY; cmd[1] = cec_msg_is_broadcast(msg); if (!err) err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 1); cmd[0] = msg->len == 1 ? MSGCODE_TRANSMIT_EOM : MSGCODE_TRANSMIT; cmd[1] = msg->msg[0]; if (!err) err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 1); if (!err && msg->len > 1) { cmd[0] = msg->len == 2 ? MSGCODE_TRANSMIT_EOM : MSGCODE_TRANSMIT; cmd[1] = msg->msg[1]; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 1); for (i = 0; !err && i + 2 < msg->len; i++) { cmd[0] = (i + 2 == msg->len - 1) ? MSGCODE_TRANSMIT_EOM : MSGCODE_TRANSMIT; cmd[1] = msg->msg[i + 2]; err = pulse8_send_and_wait(pulse8, cmd, 2, MSGCODE_COMMAND_ACCEPTED, 1); } } return err; } static int pulse8_received(struct cec_adapter *adap, struct cec_msg *msg) { return -ENOMSG; } static const struct cec_adap_ops pulse8_cec_adap_ops = { .adap_enable = pulse8_cec_adap_enable, .adap_log_addr = pulse8_cec_adap_log_addr, .adap_transmit = pulse8_cec_adap_transmit, .received = pulse8_received, }; static int pulse8_connect(struct serio *serio, struct serio_driver *drv) { u32 caps = CEC_CAP_DEFAULTS | CEC_CAP_PHYS_ADDR | CEC_CAP_MONITOR_ALL; struct pulse8 *pulse8; int err = -ENOMEM; struct cec_log_addrs log_addrs = {}; u16 pa = CEC_PHYS_ADDR_INVALID; pulse8 = kzalloc(sizeof(*pulse8), GFP_KERNEL); if (!pulse8) return -ENOMEM; pulse8->serio = serio; pulse8->adap = cec_allocate_adapter(&pulse8_cec_adap_ops, pulse8, dev_name(&serio->dev), caps, 1); err = PTR_ERR_OR_ZERO(pulse8->adap); if (err < 0) goto free_device; pulse8->dev = &serio->dev; serio_set_drvdata(serio, pulse8); INIT_WORK(&pulse8->work, pulse8_irq_work_handler); mutex_init(&pulse8->write_lock); mutex_init(&pulse8->config_lock); pulse8->config_pending = false; err = serio_open(serio, drv); if (err) goto delete_adap; err = pulse8_setup(pulse8, serio, &log_addrs, &pa); if (err) goto close_serio; err = cec_register_adapter(pulse8->adap, &serio->dev); if (err < 0) goto close_serio; pulse8->dev = &pulse8->adap->devnode.dev; if (persistent_config && pulse8->autonomous) { err = pulse8_apply_persistent_config(pulse8, &log_addrs, pa); if (err) goto close_serio; pulse8->restoring_config = true; } INIT_DELAYED_WORK(&pulse8->ping_eeprom_work, pulse8_ping_eeprom_work_handler); schedule_delayed_work(&pulse8->ping_eeprom_work, PING_PERIOD); return 0; close_serio: serio_close(serio); delete_adap: cec_delete_adapter(pulse8->adap); serio_set_drvdata(serio, NULL); free_device: kfree(pulse8); return err; } static void pulse8_ping_eeprom_work_handler(struct work_struct *work) { struct pulse8 *pulse8 = container_of(work, struct pulse8, ping_eeprom_work.work); u8 cmd; schedule_delayed_work(&pulse8->ping_eeprom_work, PING_PERIOD); cmd = MSGCODE_PING; pulse8_send_and_wait(pulse8, &cmd, 1, MSGCODE_COMMAND_ACCEPTED, 0); if (pulse8->vers < 2) return; mutex_lock(&pulse8->config_lock); if (pulse8->config_pending && persistent_config) { dev_dbg(pulse8->dev, "writing pending config to EEPROM\n"); cmd = MSGCODE_WRITE_EEPROM; if (pulse8_send_and_wait(pulse8, &cmd, 1, MSGCODE_COMMAND_ACCEPTED, 0)) dev_info(pulse8->dev, "failed to write pending config to EEPROM\n"); else pulse8->config_pending = false; } mutex_unlock(&pulse8->config_lock); } static const struct serio_device_id pulse8_serio_ids[] = { { .type = SERIO_RS232, .proto = SERIO_PULSE8_CEC, .id = SERIO_ANY, .extra = SERIO_ANY, }, { 0 } }; MODULE_DEVICE_TABLE(serio, pulse8_serio_ids); static struct serio_driver pulse8_drv = { .driver = { .name = "pulse8-cec", }, .description = "Pulse Eight HDMI CEC driver", .id_table = pulse8_serio_ids, .interrupt = pulse8_interrupt, .connect = pulse8_connect, .disconnect = pulse8_disconnect, }; module_serio_driver(pulse8_drv);